资源列表
count
- 自己编制的计数器的verilog代码 希望能对大家有所帮助
sseg
- vhdl codefor 7 segment display
radar_pulse_freq
- 对雷达的脉冲全景图部分进行编写的DSP程序,主要使用Ｃ语言实现的算法 -Panorama of the radar pulses DSP program written in part, the main algorithm using C language
24add
- 24进制it describe how to design a add24-it describe how to design a add24
USB
- 这个是Verilog的USB控制程序，用于USB与FPGA之间的通信-This is the USB Verilog control procedures for the communication between USB and FPGA
jiaotongdeng
- 显示模块包括数码管动态扫描电路和译码显示电路，动态扫描电路用于选择需要显示的数码管，译码显示电路用于将输入的二进制信息转换为数码管显示编码。显示模块中使用四个数码管显示倒计数值，两个用于显示东西方向倒计时值，两个用于显示南北方向倒计时值，使用四组红、黄、绿发光二极管显示通行、进行和转弯。由于没有转弯控制信号灯，所以使用红灯、绿灯亮黄灯闪烁作为转弯的指示信号。-The display module includes a dynamic scanning circuit and decoding o
zhuangtaiji
- vhdl状态机程序，经实验验证，没有错误！完美运行，可以用以了解状态机的初步应用！-vhdl state machine program, proved by experiments that there are no errors! Perfect run, can be used to understand the initial application of the state machine!
main
- timer 0 used for pwm generation
fir_lp
- 1. To design FIR filters in MATLAB to achieve various types of frequency selectivity, e.g., lowpass, highpass，bandpass, etc 2. To verify the frequency response of the designed filters in MATLAB 3. To implement the designed FIR filters using C67
7135
- 基于ATmega128的ICL7135驱动程序-ICL7135 based ATmega128 driver
FIR-filter-design-LP-triangular-design
- FIR filter design LP triangular design
CCSv5-China-University-Site_License
- ti官方给各个大学ccs在中国区的认证license，有了这个文件可就可以在中国任意使用注册的ccs啦。-Ti official to the various universities ccs certification in China license, with this document can be used in any Chinese registered ccs friends.