资源列表
ShiftRegister
- Shift register verilog code
123
- LED密码锁的基本功能如下1)使用LED显示器来显示密码锁输入的相关消息.(2)可以设置4位数字密码(0-9)密码.(3内定另一组4位数字密码为“1234”。(4密码输入正确则继电器启动2 S。(5密码输入错误则发出警报声。-LED locks the basic functions are as follows 1) the use of LED displays to show the relevance of the password lock information input. (2)
timer
- 用定时器实现月，日，时，分，秒计时并通过按键控制在LED上 分别进行显示。-Using Timer month, day, hour, minute, second time through the button control to display in the LED, respectively.
ringcounter
- ring counter for vhdl code
E1-Program_With_Functions
- exercise lab for students
FFT
- FFT在NIOS2上的的实现。通过AD给的值。-In the NIOS2 FFT realization.Through the AD to value.
dp
- datapath code in verilog for pipeline processor
generator
- generator of functions for vhdl
booth_mul
- 乘法器 基于改进booth编码 已验证 clk-multiplier modified booth
mc
- 可控脉冲发生器:采用1KHz的工作时钟，初始化周期为2.5s，占空比为50 ，所以周期（T）初始化为2500，占空比（Result）初始化为1250；用按键S1、S2、S3、S4分别实现周期增大、周期减小、占空比增大、占空比减小。-Controllable pulse generator
simple_ram
- the file about simple ram by VHDL code
fulladdr
- full adder source and test bench 5