资源列表
binary_to_decima
- 8位全加器的VHDL描述，可用MAX+plusⅡ运行测试-8-bit full adder of the VHDL descr iption，MAX+ plus Ⅱ can be used to run test
adder8
- Vrilog HDL 八位加法器源程序-8 adder Vrilog HDL source
XilinxISEDesignSuite12.1
- Xilinx ISE Design Suite 12.1 cd key
univ
- universal binary counter
123
- 用此程序可实现按键对数码管的数字显示顺序控制-Can be achieved with this procedure the order of buttons on the digital control
lesson8
- atmega16 red IR receiver 红处程序-atmega16 red IR receiver program
CPU2A03
- 任天堂nes系统 cpu处理器，2a03部分代码，希望大家用得着-Nintendo nes system cpu processor 2a03 part of the code, I hope you need it
xianshi
- 基于51单片机的应用开发——时钟，内有时间随时修改及闹铃的功能-51 MCU-based application development- the clock, which has the right to modify the time and alarm functions
ds
- Verilog语言，实现移相,输入方波TA，输出移相后T-Phase shifted square wave TA, the phase-shifted output TAA
adv7171
- adv7171 初始化 C 语言程序,用于ARM和单片机-adv7171 initial
mux3_if_else
- implementation of multiplexer using if else statement in verilog
CHCS
- 串行测试的一个文件，是一个测试文件，可用来测试串行数据-A serial test file is a test file that can be used to test the serial data