资源列表
1543
- ad1543的驱动程序！！！！！已经通过调试的！！请放心使用！-ad1543 driver! ! ! ! ! Through debugging! ! Please be assured of use!
MSC51
- 单片机MSC51设计的5个源程序：1、数据排序2、多功能数字钟设计3、P1口循环亮灯设计4、脉冲计数器5、8250芯片串口扩展。另附程序详细介绍。 -microcontroller design MSC51 five sources : 1, 2 ranking data, multi-function digital clock design 3, I P1 lighting design cycle 4, pulse counter 5, 8250 chip serial expansi
adder_ahead8bit
- 本文件提供了用verilog HDL语言实现的8位超前进位加法器,充分说明了超前进位加法器和普通加法器之间的区别.-using verilog HDL achieve the eight-ahead adder, fully demonstrates the CLA for ordinary Adder and the distinction between.
fpu
- 利用FPGA实现浮点运算的verilog代码 希望能够给需要做这方面研究的同仁有所帮助-use FPGA floating-point operations verilog code hope to be able to do this to the need for research in the Tongren help
JFFS2foruClinuxNANDFLASH
- uClinux下NAND FLASH的JFFS2文件系统的移植,给大家参考!-uClinux under the JFFS2 NAND Flash File System transplant, for your reference!
sdh
- 帧同步检测源码，包括同步跟踪模块，fifo,分频模块，还有系统的测试平台-frame synchronization source detection, including synchronous tracking module, fifo, frequency module, and system test platform
8051webserver.ZIP
- 8051 web server , support tcpip , ethernet -8051 web server, support tcpip, ethernet
fhe-SHISHI
- 液晶屏中央显示 e 的程序，状态位写指令和写数据的准备判断，定义显示函数e-LCD screen shows the central e procedures, state-written instructions and write data prepared judgment, the definition indicates function e
fhe-AD574
- 数据没有处理，为AD574本身所采数据，不受力时显示2048为零值-data is not, by itself for AD574 mining data from 2048 show that power to zero
fhe-pulse
- 光电编码器采集脉冲的程序，采用计数查询等待中断方式， 液晶显示正反转 ,显示脉冲数（60个/转），显示转圈数-optical encoder pulse acquisition procedures adopted count inquiries pending interruption, LCD rotating direction Pulse a few shows (60 / switch), the show moved around a few
TL431_cn
- TL431_cn.pdf格式的中文资料，可编程器件的精密参考 -TL431_cn.pdf format of Chinese data, the precision programmable device reference
FHE
- 试验AD574采力信号并液晶显示数据的小程序,数据没有处理，为AD574本身所采数据-AD574 test mining of signals and LCD data of small procedures, not data processing, AD574 itself to data mining