资源列表
ADC9481
- 利用FPGA对AD9481进行采样，亲测有用(Sampling ad9481 with FPGA)
xapp1247-multiboot-spi
- Xilinx 7系列 FPGA multiboot功能说明文档，增加FPGA加载可靠性(Xilinx 7 Series FPGA multiboot function descr iption document to increase FPGA loading reliability)
eth_Management_interface
- 千兆网的FPGA代码，非常有用的，请大家阅读(ethernet verilog coding,please read it and download it)
异步FIFO的简单设计
- 顶层连接读写模块，调用vivado IP核做缓存模块，实现读空、写满的设计
AHB2-master
- AMBA AHB 2.0 VIP in SystemVerilog UVM
AHB5-master
- amba ahb2 协议vip，包括master和slave(AMBA AHB 2.0 VIP in SystemVerilog UVM)
21
- 《数字滤波器的MATLAB与FPGA实现：Altera Verilog版》——杜勇前五章(Realization of digital filter with MATLAB and FPGA: Altera Verilog version)
22
- 《数字滤波器的MATLAB与FPGA实现：Altera Verilog版》——杜勇六到九章pdf(Realization of digital filter with MATLAB and FPGA: Altera Verilog version)
hdmi
- 滚动彩条显示。通过HDMI接口输出单色图案、渐变色、单幅马赛克、动态马赛克等图案。使用Verilog，基于Xilinx Spartan-6 LX45器件，AX6045开发板(Scroll bar display. Through HDMI interface output monochrome pattern, gradient color, single mosaic, dynamic mosaic and other patterns. Using Verilog, based on Xil
spi
- spi的串口简单数据通信实验，实现数据发送(SPI serial port simple data communication experiment, to achieve data transmission)
222
- VHDL BISS,SSI,ENDAT2.2, ENCODER
lab7
- 使用vivado和Xilinx开发板实现蓝牙远程控制，开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize Bluetooth remote control, the development board is Xilinx artix-7)