资源列表
ppscode
- verilog代码，输出秒脉冲，用于采集同步-verilog code, second pulse output for synchronization acquisition
EMIF
- 这是DSP的EMIF总线和FPGA通信的实例，已经测试能用-This is DSP EMIF bus and FPGA communication as an example, has been testing can be used
oledv1.2
- zedboard OLED显示 verilog程序-Zedboard OLED display verilog program
Modelsim-System-verilog-calls-DPI
- 本文给出了在Modelsim开发环境下，如何在systemverilog中利用DPI调用C函数的具体方法。-This paper gives a specific way to call C functions in DPPHs in systemverilog in Modelsim development environment
zhixinkeji
- 北京至芯科技FPGA的学习资料，从备战Quartus II安装到IIC通信协议，每一章都有Verilog代码并且可以实现仿真程序，非常好用，讲的很详细-Beijing Science and Technology FPGA to the core learning materials, preparing to install Quartus II IIC communication protocol, each chapter Verilog code and can achieve sim
Digital-IC-Test-Questions-Summary
- 基本涵盖目前数字方向公司的笔试题目，FPGA笔试面试题目，含有联发科技，珠海全志，兆易等公司，十分难得-The basic direction of the company covering the current numbers written questions, FPGA written interview subject, comprising MediaTek, Zhuhai Chi, Zhao Yi and other companies, very rare
Whac-A-Mole
- VHDL语言打地鼠小游戏，包含整个工程和仿真波形。-VHDL language playing hamster games, and include the entire engineering simulation waveform.
29_ad9226_test
- ad9226相关FPGA程序VHDL源代码，可直接用！-Ad9226 related FPGA program VHDL source code, can use directly!
chufaqi
- 这是一个用Verilog编写的一个除法器，可以快速的进行除法运算-This is a a divider, written in Verilog division operation can be quickly
sdi_3g_hd_sd_code
- SDI格式视频产生代码，fpga编码，里面有3个文件分别对应3g,hd,sd信号，给不同的时钟就可以直接用了-SDI format video generation code
endatreduced
- endat2.2协议对应的驱动模块代码，适用于开发面向海德汉编码器反馈环控制模块-endat2.2 driver module corresponding to the protocol codes, for developing suitable feedback loop Heidenhain encoder control module
pdm
- 适用于endat2.2协议的线缆延迟补偿模块，用于修正因线缆延迟导致的时序错位-Endat2.2 protocol suitable for the cable delay compensation means for correcting the timing misalignment due to a delay caused by cables