资源列表
zhitouzi
- 原创。掷骰子游戏，VHDL，quartus，北京邮电大学数电实验，实现随机掷骰子游戏，在数码管显示点数，点阵显示输赢，有开机动画以及开机音乐，可实现多人游戏等-games, VHDL, quartus,experiments of BUPT, pure originality,random game, in the digital display dots, dot matrix display winning or losing, there are boot animation and bo
Verilog-Digital-control
- Verilog HDL数字控制系统设计实-冼进-源代码-4469-Verilog HDL digital control system design implementation- Xian Jin- source code-4469
FPGA
- 常用的FPGA开发板的资料，方便大家查阅。-PGA development board used to facilitate access to information.
EDK13.1
- xilinx 2011全国电子设计大赛赞助商 EDK 应用设计讲述了其嵌入式的应用-xilinx 2011 National Electronic Design Competition Sponsored EDK embedded application design describes its application
usb
- 中级篇05：USB设备接口驱动，适合新手，可以直接实例化，内有原理介绍等文件，有代码，强力推荐-Intermediate Part 05: USB device interface driver, suitable for novice, can be directly instantiated with a schematic presentation and other documents, has the code, strongly recommended
1
- VHDL书籍可以很好的为学生提供简单的基础学习指导-VHDL books can provide students with a good basis for a simple study guide
DE2_CCD_CV
- altera DE2 实验板专用 CCD驱动
VHDL-program
- VHDL实验程序。需要的可以在此基础上修改。-Program VHDL experiment. Need can be modified on this basis.
Sram(v0.2.20090115)
- SRAM FPGA编程 CYLOON2系列均可使用-SRAM FPGA programming CYLOON2 series can be used
nios
- altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
cordic
- 生成正余弦函数，根据cordic算法可以生成sin和cos(Generating sin or cos function)
clock_div
- verilog编写的分频器,基于计数器编写的-divider verilog prepared