资源列表
MySopc
- 自己亲自设计的软核，可以打开详细的设计细节，仅作为参考，自己用的话要根据自己的情况进行设计。-Soft-core own personally designed, you can open the detailed design details, only as a reference, they used words to be designed according to their own situation.
e2prom_rd
- 该verilog代码用于E2PROM操作运用，用于I2C时序操作，存储数据-Operation is applied, the verilog code used in the E2PROM chips was introduced for I2C timing operation and store data
icnado_newgood_pinlvji
- 使用ISE编译的频率计，可测最低频率范围1hz，最高根据系统时钟决定-ISE compiled using the frequency meter, the lowest measurable frequency range 1hz, the highest decision according to the system clock
UART_DMA
- 基于DE1的nios的串口sdram通信例程-Based on DE1' s nios serial communication routines sdram
UART_DMA
- 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
TFT_3.5
- 乱写说明或说明不够认真 -Write without explanation or descr iption is not enough to seriously
lab
- microblaze实验，完整，在spartan3estarterkit 板上实验正确，包括普通IO,LCD，串口，下载等-the microblaze experiments, complete correct experimental, in spartan3estarterkit board, including ordinary IO, LCD, serial, download
Altera_SoC_seminar
- Altera SOC Seminar November 2012
Farsight060915FPGA-1
- 华清远见FPGA公益活动视频教程之sopc硬件系统开发-China Qingyuan see video tutorial of charitable activities FPGA hardware development sopc
BUJINDIANJI
- 考虑单片机资源以及实际工作需要，—般在255个加速台阶内完成达到最高速度的启动、加速全过程，而当实际需要的(最高)速度随每次的执行任务情况变化而改变时，我们在程序设计上就按照工作对象的最高速度计算参数表，在每次启动电机运行前恨据需要行走总步数换算出最高加速台阶数量，基本上按照三个1/3的办法去换算，即1/3的行走步数用于加速，1/3用于保持高速运行，1/3完成从高速到低速的降速停止，实现自动调速。根据实际需要也可以用2/5-1/5-2/5方案调速，使电机完成总步数的时间更短一些，也有时为了保证电
DES_VHDL
- DES VHDL FPGA CODING
8_uart_test
- 实现了通信串口的实验，包括发送和接收，工程完整(Serial communication to achieve the experiment, including sending and receiving)