资源列表
digital-downconversion
- 一篇关于基于FPGA的数字下变频的不错文章，值得参考。-An article on FPGA-based digital downconversion good article, worth considering.
07_number_mod
- 该程序为数码管程序，编译环境为Quartus/Xilinx，使用语言为VerilogHDL-The program for the digital program, the compiler environment Quartus/Xilinx, use language VerilogHDL
e12HDB3
- 清华大学电子工程系 HDB3实验报告 包括：M序列发生器，编码器，解码器-Electronic Engineering, Tsinghua University HDB3 lab report include: M sequence generator, encoders, decoders
tse_datapath_reference_design
- altera FPGA实现千兆以太网数据通信的程序源代码-altera FPGA Gigabit Ethernet data communication program source code
T_PCNN1
- 关于pcnn图像分割的VHDL语言编写的程序,使用的是DE2板子-segmentation based on PCNN was implemented by FPGA
Quartus_IIFPGA
- Quartus_II的FPGA设计手册,详细的介绍了有关的内容-Quartus_II of FPGA Design Manual, a detailed descr iption of the contents of the
Quartus_IIuserbook
- 非常棒的一本Quartus_II进行FPGA设计的使用指南，里面设计步骤要点详细，讲解通俗易懂，最关键的是图示非常详尽。绝对值得下载。你懂得！-Great a Quartus_II for FPGA design guide, which details the design steps points to explain the easy to understand, the key is shown in great detail. Definitely worth downloading.
fir_9222_sopc
- 基于sopc技术的数字均衡器带通滤波器及12864液晶显示-Sopc technology-based digital equalizer band-pass filter and liquid crystal display 12864
ex15_logic_analysis
- fpga硬件实现逻辑分析仪，利用vga输出到显示器-fpga hardware logic analyzer using the vga output to the display
AD0809P1602
- 0809的采样控制程序和1602的显示程序的顶层文件的原理图-0809 and 1602 sampling program control display program of top-level schematic file
nois
- nios好的初学者好的资料手把手教你每个好的nios实例-Nios good beginner good material taught you how nios every good examples
number_mod
- 以verilog设计最大为99数字在2个数码管资源上的显示，采取的方法是同步动态扫描。-Verilog design to a maximum of 99 digits displayed on two digital resources, the approach is synchronous dynamic scanning.