资源列表
RISCCPU
- 简单的CPU设计流程PPT，用于教学目的，可综合的verilog HDL设计。-A simple CPU design process PPT, for teaching purposes, can be integrated verilog HDL design.
bubble_verilog
- 可综合的基于FPGA实现冒泡排序!资料仅供学习参考，包含tb文件-FPGA-based implementation can be integrated bubble sort! Information for reference purposes only to learn that contains the file tb
demo
- 1. 创建多 Task，为每个Task 创建私有的Message Queue，每个Task 只通过自己的私有Message Queue 接收消息；Task 间消息通信通过向对方私有Message Queue 发送消息完 成。 2. Task1：管理Task。负责系统启动时同步系统中其他Task 的启动同步，利用信号量的semFlush()完成。同时接收各Task 的告警信息，并负责系统结束时的Task 删除处理。 3. Task2：激励Task。利用taskDelay()完成周期地向
TFT_init2
- TFT_lcd on lpc without os.
CAN_RTL
- RTLINUX based CAN protocol implementation
spec_of_information_device
- 基于三星S3C2440的某信息控制终端产品的规范-the spec of one information control device, based on S3C2440.
C8051F34x
- USB实例,F340控制器,USB从机控制
ds3231
- ds3231 driver for the rtc time get and set -ds3231 driver
DS1302DS18B20lcd1602
- DS1302DS18B20lcd1602单片机实现-DS1302DS18B20lcd1602 MCU
KKLcd
- code for LCD interfacing with controller starting steps to LCD initialization in 4 bit mode
8051_basic_Programs
- this file has many 8051 basic programs for AT89c51 written in C language.... compiles in keil uv2
Lpc21xx-programs
- this file is having many lpc 21xx programs...written in C .....compiled in keil