CDN加速镜像 | 设为首页 | 加入收藏夹
登陆 | 会员注册
当前位置： 首页 资源下载 源码下载 嵌入式/单片机编程 VHDL编程
收藏

文件名称:PLL

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    124.39kb
  • 已下载：
    0次
  • 提 供 者：
    许***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
电信下载 联通下载
别用迅雷、360浏览器下载。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

PLL是数字锁相环设计源程序,

其中, Fi是输入频率(接收数据),

Fo(Q5)是本地输出频率.

目的是从输入数据中提取时钟信号(Q5),

其频率与数据速率一致,

时钟上升沿锁定在数据的上升和下降沿上；

顶层文件是PLL.GDF-Digital phase-locked loop PLL is the design source code, which, Fi is the input frequency (receive data), Fo (Q5) is a local output frequency. The purpose is to extract data from the input clock signal (Q5), their frequency and data rate in line clock rising edge of lock-in data on rising and falling edge　PLL.GDF top-level document
相关搜索： digital phase lock loop pll digital lock loop

(系统自动生成,下载前可以参看下载内容)

下载文件列表

Digital phase-locked loop PLL/dpll.gdf
Digital phase-locked loop PLL/edge.gdf
Digital phase-locked loop PLL/edge.sym
Digital phase-locked loop PLL/fenpin.sym
Digital phase-locked loop PLL/fenpin.v
Digital phase-locked loop PLL/pll/aa.gdf
Digital phase-locked loop PLL/pll/edge.acf
Digital phase-locked loop PLL/pll/edge.cnf
Digital phase-locked loop PLL/pll/edge.fit
Digital phase-locked loop PLL/pll/edge.gdf
Digital phase-locked loop PLL/pll/edge.hex
Digital phase-locked loop PLL/pll/edge.hif
Digital phase-locked loop PLL/pll/edge.mmf
Digital phase-locked loop PLL/pll/edge.ndb
Digital phase-locked loop PLL/pll/edge.pin
Digital phase-locked loop PLL/pll/edge.pof
Digital phase-locked loop PLL/pll/edge.rpt
Digital phase-locked loop PLL/pll/edge.scf
Digital phase-locked loop PLL/pll/edge.snf
Digital phase-locked loop PLL/pll/edge.sof
Digital phase-locked loop PLL/pll/edge.ttf
Digital phase-locked loop PLL/pll/inst1.gdf
Digital phase-locked loop PLL/pll/mealy1.acf
Digital phase-locked loop PLL/pll/mealy1.cnf
Digital phase-locked loop PLL/pll/mealy1.fit
Digital phase-locked loop PLL/pll/mealy1.gdf
Digital phase-locked loop PLL/pll/mealy1.hex
Digital phase-locked loop PLL/pll/mealy1.hif
Digital phase-locked loop PLL/pll/mealy1.mmf
Digital phase-locked loop PLL/pll/mealy1.ndb
Digital phase-locked loop PLL/pll/mealy1.pin
Digital phase-locked loop PLL/pll/mealy1.pof
Digital phase-locked loop PLL/pll/mealy1.rpt
Digital phase-locked loop PLL/pll/mealy1.scf
Digital phase-locked loop PLL/pll/mealy1.snf
Digital phase-locked loop PLL/pll/mealy1.sof
Digital phase-locked loop PLL/pll/mealy1.ttf
Digital phase-locked loop PLL/pll/pll(1).cnf
Digital phase-locked loop PLL/pll/pll(2).cnf
Digital phase-locked loop PLL/pll/pll(3).cnf
Digital phase-locked loop PLL/pll/pll(4).cnf
Digital phase-locked loop PLL/pll/pll(5).cnf
Digital phase-locked loop PLL/pll/pll.acf
Digital phase-locked loop PLL/pll/pll.cnf
Digital phase-locked loop PLL/pll/pll.fit
Digital phase-locked loop PLL/pll/pll.gdf
Digital phase-locked loop PLL/pll/pll.hif
Digital phase-locked loop PLL/pll/pll.jam
Digital phase-locked loop PLL/pll/pll.jbc
Digital phase-locked loop PLL/pll/pll.mmf
Digital phase-locked loop PLL/pll/pll.ndb
Digital phase-locked loop PLL/pll/pll.pin
Digital phase-locked loop PLL/pll/pll.pof
Digital phase-locked loop PLL/pll/pll.rpt
Digital phase-locked loop PLL/pll/pll.scf
Digital phase-locked loop PLL/pll/pll.snf
Digital phase-locked loop PLL/pll/pll1(1).cnf
Digital phase-locked loop PLL/pll/pll1(2).cnf
Digital phase-locked loop PLL/pll/pll1(3).cnf
Digital phase-locked loop PLL/pll/pll1(4).cnf
Digital phase-locked loop PLL/pll/pll1.acf
Digital phase-locked loop PLL/pll/pll1.cnf
Digital phase-locked loop PLL/pll/pll1.fit
Digital phase-locked loop PLL/pll/pll1.gdf
Digital phase-locked loop PLL/pll/pll1.hif
Digital phase-locked loop PLL/pll/pll1.jam
Digital phase-locked loop PLL/pll/pll1.jbc
Digital phase-locked loop PLL/pll/pll1.mmf
Digital phase-locked loop PLL/pll/pll1.ndb
Digital phase-locked loop PLL/pll/pll1.pin
Digital phase-locked loop PLL/pll/pll1.pof
Digital phase-locked loop PLL/pll/pll1.rpt
Digital phase-locked loop PLL/pll/pll1.snf
Digital phase-locked loop PLL/read me.txt
Digital phase-locked loop PLL/updown_counter.sym
Digital phase-locked loop PLL/updown_counter.v
Digital phase-locked loop PLL/pll
Digital phase-locked loop PLL

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台，只提供交流渠道，下载内容来自于网络，除下载问题外，其它问题请自行百度。更多...
  • 本站已设置防盗链，请勿用迅雷、QQ旋风等下载软件下载资源，下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载，请稍后再次尝试；或换浏览器；或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎，请到消费记录里找到下载记录反馈给我们，经确认后退回积分.
  • 如下载前有疑问，可以通过点击"提供者"的名字，查看对方的联系方式，联系对方咨询.
查看所有评论

相关评论

暂无评论内容．

发表评论

*快速评论： 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内　　容：
*验 证 码：
搜珍网 www.dssz.com