搜索资源列表
8127-API
- DM8127 串口通信，通过SPI与FPGA通信-DM8127 serial communication, and FPGA via SPI communication
1112
- 基于fpga平台的与HMI屏幕的串口连接实现简单图像的显示和触屏操作-Fpga based platform serial connection with HMI screen image display and simple touch-screen operation
1313721777
- nexys3 FPGA开发板的uart nexys 3 串口测试程序-nexys3 FPGA uart
usbinf
- 基于FPGA的软核设计可以实现串口通信和usb通信的双向传输，以及可以在软核基础上实现无线以太等其他通信-FPGA-based soft-core design can be achieved usb communication serial communication and two-way transmission, and can be implemented in other communications such as wireless Ethernet based on soft-c
FIFO
- fifo异步串口收发程序 FPGA程序-fifo asynchronous serial transceiver
4_uart
- FPGA开发板 nios 下的串口通信 采用寄存器操作方式-FPGA development board serial communication using nios register operations
uart_r3
- 通过r232串口接收来自PC机或者是接收模块的数据，然后可以再fpga板子上做相应的处理得到想要的结果。-uart
SDRAM_96M_UART_TestOK
- SDRAM_96M_串口实验OK 一个项目工程，硬件包含Altera FPGA，SDRAM，串口，使用verilog-SDRAM_96M_ serial experiments OK a project engineering, hardware contains Altera FPGA, SDRAM, serial port, using verilog
DACtoADCtoSPI_Triangle1
- DACtoADCtoSPI_Triangle1.zip 一个项目工程，硬件包含Altera FPGA，SDRAM，串口，使用verilog-DACtoADCtoSPI_Triangle1.zip a project engineering, hardware contains Altera FPGA, SDRAM, serial port, using verilog
uart_tx_rx
- 在altera的FPGA平台上实现rs232串口的自收发通信，速率为115200波特率，PC机使用串口调试助手即可观察结果。包含全部代码与工程，本人亲自测试通过。-Realization of self transmitting and receiving communication serial port of RS232 In altera on the FPGA platform, at a rate of 115200 baud rate, PC using serial debuggi
switch_power_identify
- FPGA实现智能数控电压，此为FPGA代码，器件为A3PN250,软件为libro。采集电压电流参数，实现PID调节，通过串口通信配置，实现输出电压和保护点的调节。- ON划词翻译ON实时翻译 FPGA intelligent digital voltage, this FPGA code, based on A3PN250, the software for the libro. Acquisition of vo
ad7606_control
- ad7606 fpga接口 程序 ，实现ad7606的串口 读写，数据缓存-ad7606 controller,writen by verilog.
UART-Verilog-source
- Verilog编写UART串口例程，实现FPGA与上位机串口通信，利用ASCII码进行大小写转换，在Xilinx Virtex-5开发板测试通过-UART serial routines written in Verilog, FPGA serial communication with the host computer using the ASCII code case conversion, in the Xilinx Virtex-5 development board test
Verilog-RS232
- 本程序是在FPGA里面模拟RS232串口，并在已调试成功。-This procedure is simulated in FPGA RS232 serial port, and in the debugging success
my_uart2
- 基于FPGA的串口通信源代码。已经经过调试助手测试，-Release 13.2- WebTalk (O.61xd) Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. Project Information -------------------- ProjectID=BFC2DD71D6FA404A87FDA640DB4B5999 ProjectIteration=14 WebTalk Sum
test_232
- 这里包含了FPGA的232串口调试程序，可供学习和借鉴-FPGA RS232 TEST
UART
- 使用标准VHDL编写的RS232协议，可在CPLD或者FPGA上直接实现串口通信功能。-use VHDL to implement RS232 protocol, which can be used in CPLD or FPGA
fp1-40-1_1
- fpga任意频率输出，精度《=2 ，串口控制分频系数，从50hz-51.2k精确分频，其中还包括小数点的处理。 通信部分：波特率处理模块、数据接受模块、数据校验及解码模块 分频部分：altpll锁相环模块，分频数计算模块、小数0.5检验模块、分频模块 -fpga any frequency output accuracy " = 2 , serial control division factor, from 50hz-51.2k precision divider, whi
UART
- Verilog HDL编写的串口程序实例，很详细好用的参考代码。针对Xilinx FPGA开发板，在Xilinx ISE编译调试成功，串口开发的经典例程。-Verilog HDL serial program written examples, very good reference code in detail. In view of the Xilinx FPGA development board, in Xilinx ISE compiler debugging success, a s
uart
- 串口通信时初学FPGA者必须要掌握的基础知识，这里给出了UART通信的VHDL代码，以及仿真测试文件。-A serial port communication beginner to must master the basic knowledge of FPGA, UART communication VHDL code is given here, and the simulation test files