搜索资源列表
USB2.0
- usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
xapp716_release
- 基于FPGA的SATA控制器，可以完成SATA1.0协议-FPGA-based SATA controller, you can complete SATA1.0 agreement
FPGA_Clk
- 基于Cyclone EP1C6240C8 FPGA的时钟产生模块。主要用于为FPGA系统其他模块产生时钟信号。采用verilog编写。 使用计时器的方式产生时钟波形。 提供对于FPGA时钟的偶数分频、奇数分频、始终脉冲宽度等功能。-Based on Cyclone EP1C6240C8 FPGA' s clock generator module. Is mainly used for the FPGA system clock signal generated in other
key_scan
- FPGA键盘扫描，采用VHDL语言编写的键盘扫描代码-FPGA keyboard scanning, the use of VHDL language keyboard scan code
DDC_DUC
- 数字上下变频FPGA设计的详细介绍资料，还是中文的。很舍不得上传的哦。-FPGA digital down conversion design detailed information, or Chinese. Oh, very reluctant to upload.
uart_lcd
- fpga通过串口输入字符显示在1602lcd上，编译仿真通过，完整源码-Through the serial input character is displayed in the 1602lcd
vga_control
- vga 控制器的verilog 源码 ，fpga上可实现图片的显示-vga controller Verilog source code, fpga achievable picture display
counter
- 关于FPGA实现的几种计数器的verilog源程序-FPGA implementation of several counter verilog source code
PMO13701
- OLED mappingg.... FPGA document
link_port-v1[1].1.0
- 用于测试ADI的TS201与FPGA之间通信的LINK程序，压缩文件内包括VHDL和Verlog代码。-ADI is used to test the communication between the TS201 and the FPGA' s LINK program, compressed file to include VHDL and Verlog code.
TFTLCD
- 基于FPGA的彩屏LCD控制器，800*480，显示彩条，TFT LCD型号AT070TN83-The TFT Lcd controller based on FPGA.The Matrix is 800*480,it can display color bands.
sdram_test
- FPGA测试程序，使用XC3S250E对SDRAM进行读写的测试程序，SDRAM使用的是HY57V281620， 大小为128M。-FPGA test procedure, the use of XC3S250E SDRAM read and write on the test procedure, SDRAM using HY57V281620, size of 128M.
DE2
- FPGA DE2 EP2C35F672C6 开发板原理图、使用手册-FPGA DE2 EP2C35F672C6 development board schematics, user manual
fpga_ads8364
- fpga控制ti的多通道高精度ad芯片ads8364的verilog源码-fpga multi-channel high-precision control ti ad-chip ads8364 the verilog source code
gpmc-fpga
- 在AM3730开发开发板上实现GPMC总线和FPGA的通信-AM3730 development on the development board GPMC bus and FPGA communication
fft_fir_filter_latest.tar
- 数字滤波器的源代码，已经仿真，FIR ，分布式算法，FPGA-digital filter multerRTL,FIR,DA,FPGA,shixian wancheng
16FFT
- 基于FPGA的16点FFT实现VEILOG-FPGA 16FFT VERILOG
app
- FPGA应用，Altera的FPGA开发板原理图汇集，FPGA最小系统，rs232串口转换，VGA显示-FPGA applications, Altera s FPGA development board schematic pooling, FPGA minimum system, rs232 serial converter, VGA display etc.-FPGA应用，Altera的FPGA开发板原理图汇集，FPGA最小系统，rs232串口转换，VGA显示-FPGA applicati
SPI_Wishbone_Controller
- FPGA SPI总线硬件描述语言Verilog下的实现-FPGA SPI bus under the Verilog hardware descr iption language to achieve
test_ad9852
- 使用FPGA来控制DDS信号的产生，从而达到高频信号产生的目的。使用的DDS芯片为AD9852，在QuartusII下编写。-Using the FPGA to control the DDS signal generation, so as to achieve high-frequency signal generation purposes. Use of DDS chip AD9852, in the QuartusII prepared.