搜索资源列表
pka_engine
- rsa ecc加速器源码和仿真环境，用于fpga-rsa ecc rtl and sim
12_lcd_spi
- 用于FPGA开发板的LCD显示实验源码包，欢迎大家下载交流，有不周之处还望批评指点！-For FPGA development board LCD display experiment source package, welcome to download the exchange, there are ill also look criticism pointing!
VGA_test
- 基于FPGA的VGA显示源码，具体分辨率数据下板调试-Debugging FPGA-based VGA display the source code under the specific resolution data plate
serial_Verilog
- 特权同学的串口通信程序，Verilog语言，FPGA开发学习源码-Serial communication program, privileged students Verilog language, FPGA development learning source
VmodCAM_Ref_VGA_Split
- 双目视觉系统的FPGA实现；CMOS摄像头驱动，VGA图像显示；SDRAM控制器；调试成功；Diligient公司源码IP核-Binocular vision system on FPGA CMOS camera driver, VGA image display SDRAM controller
76
- FPGA的76个实用例程源码，适用于新手的快速入门-FPGA' s 76 practical routines source for novice Getting Started
12
- FPGA工程师成长手册源码，可以帮初学者很好的学习掌握FPGA的开发应用。-FPGA S
13
- FPGA工程师成长手册源码，可以帮初学者很好的学习掌握FPGA的开发应用。-FPGA S
vip_ex9
- 本段源码实现功能为从摄像头采集到VGA输出的FPGA代码，内附编译好的工程文件-This segment functions as a collection source implementation the camera to the VGA output of the FPGA code, containing compiled project file
ex15
- vhd数码管测试源码，同时六个数码管控制，显示。-using ALTERA s FPGA design, QUARTUS software development platform.
CLOCK-CODE-VHDL
- VHDL源码程序，功能完整的时钟电路代码-using ALTERA s FPGA design, QUARTUS software development platform.VHDL CARD,
miaobiao
- 使用VHDL\FPGA实现秒表的设计，包含所有源码。-Use VHDL\FPGA to achieve a stopwatch
fsmc_fpga
- STM32单片机与FPGA 总线通信源码，编译通过，有需要的拿去用-stm32 fpga fsmc source code
VHDL-qiangdaqi
- VHDL语言实现的抢答器功能，源码和原理图都包含在文件内，可以直接在FPGA上运行。-The VHDL Responder function, source code and schematics are included in the file, you can run directly on the FPGA.
USB3_a3p1000_9.1__
- 8bit10bit编解码、SPI解串、BAT656接受源码，并通过USB3.0 传送至PC机。经测试actel fpga 时钟频率100M可以满足320MB/s的传输速率-8bit10bit encoding and decoding, SPI solution string, BAT656 accept the source code, and through USB3.0 to PC. After testing the FPGA Actel clock frequency 100M can
ethernet_tri_mode
- FPGA 10M/100M/1000M以太网IP核源码，外接88e1111phy芯片进行了仿真验证，对FPGA 以太网MAC层开发人员非常有用-The FPGA 10 m/100 m/1000 m Ethernet IP core source code, an external 88 e1111phy chip simulation verification, is very useful for developers FPGA Ethernet MAC layer
VGAPPS2PCORDIC
- FPGA课程设计源码，整合VGA,PS2键盘，CORDIC三角函数算法，在basys2平台上使用完全可行。-FPGA curriculum design source, integrated VGA, PS2 keyboard, CORDIC trigonometric algorithm, used on basys2 platform entirely feasible.
i2s_input
- 基于FPGA的i2s接口输入模块设计，其中有原理图和verilog源码，可在Quartus环境下进行仿真-FPGA-based i2s interface input module design, including schematics and verilog source code, can be simulated in Quartus environment
lena
- lena v1.0开发板的源代码，实现了对lena FPGA开发板各个部件的调用，直接在此源码上修改即可实现不同的功能-lena v1.0 development board source code, a call to the various components lena FPGA development board, in this modified source code directly to different functions
verilog
- 数字信号处理的FPGA实现(第3版) verilog源码-FPGA digital signal processing (3rd Edition) verilog source