搜索资源列表
HDLC-code
- 网络通信的HDLC源码，使用CPLD/FPGA实现-HDLC network communications source code, the use of CPLD/FPGA to achieve
traffic_controller
- 一款交通灯控制芯片的verilog源码，该源码通过仿真并在FPGA上运行成功，可以实现上位机操作控制交通灯的工作模式：两相模式和四相模式。上位机操作通过串口调试助手来完成。源码中与上位机的接口采用的是UART接口。-This is a verilog code for a kind of traffic light controller. The code was simulated and verificated on FPGA. When the code works on FPGA, it
DspFPGAmotorControl
- 一种基于Dsp和FPGA的运动控制卡源码(步进电机驱动),开发环境:ccs3.3 ISE10.1-a src of motor control board based on DSP and FPGA
E9_1_PnCode
- 数字调制解调技术的MATLAB与FPGA实现一书扩频章节的matlab源码- Digital modulation and demodulation MATLAB and FPGA technology to achieve a spread book chapters matlab source
Camera_Logic
- 双目视觉成像，双目视觉摄像头，3D摄像头对应的FPGA图像采集逻辑程序。1> 适用于：单目和多目视觉系统。2> 附图为双摄像头系统，应用了两条图像控制流水，源码对应图中红色的逻辑块，本人已实测代码为OK。-Imaging binocular vision, binocular vision camera, 3D camera image acquisition corresponding FPGA logic program. Applies to: monocular vision
Frequency-meter-program-source-code
- 基于FPGA实现的采用等精度测频原理的频率计程序源码与仿真-Frequency meter program source code and simulation based on the use and other precision frequency measurement principle of FPGA implementation
fft_core_test
- 基于FPGA的FFT的IP核实现，有其详细源码，采用verilog语言编写，内容详细-The FFT based on FPGA IP core implementation, has its source in detail, using verilog language writing, detailed content
altera_1c12_test
- 基于FPGA的串行flash读写设计程序源码-Based on the FPGA design of serial flash, speaking, reading and writing program source code
EMIFA_FPGA_DMA
- DSP中通过EMIF接口与FPGA通信源码-DSP via the EMIF interface with FPGA communication source
of
- VHDL源码OFDM信号传输系统基于FPGA(Field-Programmable Gate Array)-VHDL source OFDM signal transmission system based on
shuzupinlvji_
- 使用FPGA开发，包含数字频率计完整报告，电路图和源码。-Using FPGA development, including digital frequency meter complete report, circuit diagram and source code.
3-8
- 38译码器基于FPGA的详尽的Verilog HDL源码，可实现拨动开关小灯对应亮灭-38 decoder design
lan91c111
- MAC芯片LAN91C111驱动源码，quartus开发环境，Verilog HDL开发语言。自己编写调试通过。对FPGA控制MAC开发者非常有用。-MAC chip LAN91C111 driver source code, quartus development environment, Verilog HDL development language. Write debugging through their own. Very useful for FPGA control MAC d
HDMI_4AV
- 该源码为基于FPGA的HDMI显示的一拖四的AV视频采集。该模块可方便移植在需要使用HDMI高清显示的场合，并且可将VGA显示一分为四，方便各个窗口显示不同的图像信息-The source for the FPGA-based HDMI display of a four of the AV video capture. The module can be easily transplanted in the need to use the HDMI high-definition displa
HDMI_FPGA
- 该源码可基于FPGA设置多分辨率的HDMI显示，且其包含了完整的时序和端口、地址映射，可以很方便的将其移植-The source code can be set based on FPGA multi-resolution HDMI display, and it includes a complete timing and port, address mapping, it can be easily transplanted
FPGA_Vision
- 该源码为基于FPGA的工业现场实时监控界面的设计，本模块可实际运用于FPGA工业应用场合，也可以作为FPGA设计的参考-The source code for the FPGA-based industrial real-time monitoring interface design, the module can be used in the actual application of FPGA industry applications, can also be used as a ref
FPGA_txt
- 该源码为基于FPGA所开发的TXT文本阅读器，本模块可运用于阅读器开发的实际运用中，并且可用作FPGA开发各类阅读器的模板框架-The source code for the development of FPGA-based TXT text reader, the module can be used in the practical development of the reader, and can be used as FPGA development of various types
verilog
- 《数字信号处理的FPGA实现（第三版）》作者：U.Meyer-Baese 的配套源码，基于quartus9.0编写，使用的cyclone ii。其中包含FIR IIR FFT等算法的实现，对学习图像处理很有帮助。- FPGA digital signal processing (third edition) Author: U.Meyer-Baese The matching source, based on quartus9.0 preparation, the use of cyc
vhdl
- 《数字信号处理的FPGA实现（第三版）》作者：U.Meyer-Baese 的配套源码，基于quartus9.0用VHDL编写，使用的cyclone ii。其中包含FIR IIR FFT等算法的实现，对学习图像处理很有帮助。- FPGA digital signal processing (third edition) Author: U.Meyer-Baese The matching source, based on quartus9.0 prepared using VHDL, t
ethernet_verilog
- 1000M以太网UDP协议在FPGA的实现源码，测试通过-1000M Ethernet UDP protocol in the FPGA to achieve source, the test passed