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Verilog-shuzipinlvji
- 数字频率计，基于Verilog HDL,内含哥哥功能模块子程序-Digital frequency meter, based on Verilog HDL, function modules containing subroutines brother
HDB3
- 在ISE软件环境下，用Verilog HDL语言实现通信中的HDB3码的编码和译码，并有仿真波形。-In the ISE software environment, using Verilog HDL language for communication in the HDB3 code encoding and decoding, and a simulation waveform.
FPGA-verilog-fenpin
- FPGA最常用的功能，分频，利用verilog HDL语言实现的，非常适合初学者。-FPGA most commonly used functions, frequency, using verilog HDL language, and is ideal for beginners.
101259356ethernet
- etherent testbeanch by using verilog hdl
Verilog-HDL--design-skill
- 该文档很好的介绍了verilog的设计方法，讲的比较详细，希望对读者有帮助-A good introduction to the document verilog design methodology, speaking in more detail, hope to help readers
PWM
- verilog描述 PWM IP核 内部包括载波 占空比 和时能寄存器-IP kernel of PWM based on Verilog hdl
div_frequency
- 任意分频器，用Verilog HDL实现，只需修改参数可以实现奇数、偶数分频，FPGA应用必备资料。-Any divider, using Verilog HDL to achieve, simply modify the parameters can be achieved odd, even frequency, FPGA applications necessary information.
fifo
- Verilog HDL实现复杂逻辑设计FIFO-Verilog HDL to achieve FIFO
RS
- RS译码器的设计源程序--verilog HDL实现-Design of the RS decoder source code-- Verilog HDL
Jpeg_decoder
- It is jpeg_decoder program. Source code are C and Verilog HDL.File .c reads data from jpeg and convert it to binary bit stream.Decoder is by verilog file
1602lcd
- veriog HDL语言实现LCD1602显示-This program can drive the LCD1602 with verilog HDL language
5B6B-codec
- verilog hdl实现5B6B编译码（光纤通信线路码型），包含了时钟发生器模块 ，信号源模块 ，编码模块 ，译码模块， 和检错模块，并通过modesim仿真验证。-verilog hdl achieve 5B6B encoding and decoding (code-based fiber-optic communication lines), contains a clock generator module, signal source modules, code modules, d
huawei-Verilog
- 华为内部资料，Verilog HDL语言的初级教程-Huawei internal information, Verilog HDL language primer
verilog_jiaotongdeng
- 为Verilog Hdl代码，实现交通灯系统每个路口每次绿灯维持的时间是40 秒,黄灯为5 秒 ,左转灯10秒，红灯60秒-Code for the Verilog Hdl, to achieve traffic light system to maintain each intersection green time for each 40 seconds, yellow for 5 seconds, turn left at light for 10 seconds, the red lig
Verilog-HDL-design
- verilog方法逻辑设计教程，教会复杂电路设计的基本-verilog tutorial method of logic design, circuit design of the basic church complex
Verilog-For-Dummies
- Verilog HDL for Dummies! Verilog for Beginners. Easy tutorial
Verilog-tutorials
- Verilog HDL语言的高级教程，上百页PPT，英文，很实用~建议有一定英语基础的看一下-verilog HDL language advanced tutorials, hundreds of pages, in English, very practical-
(www.entrance-exam.net)-GEN.-APP
- verilog hdl code for speed control of dc motor
Verilog
- 基于verilog HDL编写的各种实例。。里面记载了计数器，全加器，等等的代码。-Based on various examples written in verilog HDL. . Recording the counter, full adder, and so the code.
yuanchengxu
- 基于Verilog HDL的通信系统设计-Design of communication system based on Verilog HDL