当前位置:
首页 资源下载
搜索资源 - verification verilog
搜索资源列表
-
0下载:
AES算法加解密过程的Verilog代码,包括测试文件,通过FPGA验证。-AES algorithm encryption and decryption process Verilog code, including test files through the FPGA verification.
-
-
0下载:
8b10b编码方式,verilog语言实现,有测试程序。能成功编码。没有环回验证,读者可自行编写环回验证测试程序。-8b10b encoding, verilog language, test procedures. Successful encoding. No loopback verification, readers can write your own loopback verification test procedures.
-
-
0下载:
Verilog编程实现步进电机的单双八拍的四路脉冲信号。采用28BYJ-48步进电机(驱动ULN2003)验证可以实现其正反转。-Single and double eight four-shot pulse signal Verilog Programming stepper motor. Using 28BYJ-48 stepper motor (driver ULN2003) verification can achieve its inversion.
-
-
0下载:
// --- --- --- --- --- --- --- --- --- --- --- --
// Copyright (c) 2007 by Terasic Technologies Inc.
// --------------------------------------------------------------------
//
// Permission:
//
// Terasic grants permission to use and mod
-
-
0下载:
基于FPGA的RSA加解密系统,通过FPGA验证代码为Verilog,开发板为DE2-115-RSA encryption and decryption system based on FPGA, through the FPGA verification code for the Verilog development board, DE2-115
-
-
0下载:
基于FPGA的Twofish加解密系统,通过FPGA验证代码为Verilog,开发板为DE2-115-Twofish encryption and decryption system based on FPGA, through the FPGA verification code for the Verilog development board, DE2-115
-
-
0下载:
产用的Verilog语言设计实例,适合初学者,代码通过验证。包含PCI、i2c等-Production design example Verilog language, suitable for beginners, through the verification code.Contains the PCI, i2c, etc
-
-
1下载:
ST公司的M25Pxx SPI flash memory的verilog仿真模型,该模型准确地描述了SPI flash memory的行为,包括读,写,擦除等操作,可以用来挂在带有SPI接口的soc外部,方便验证SPI接口。 -ST' s verilog simulation model M25Pxx SPI flash memory, the model accurately describes the SPI flash memory behavior, including readi
-
-
0下载:
这个是关于音频方面的SOPC设计,这个源代码是软硬件协同设计,包括verilog和C语言设计两个部分,验证,可以通过。-This is about the audio side of SOPC design, the source code is the hardware and software co-design, including verilog and C language design two parts, verification, you can.
-
-
0下载:
使用Verilog HDL 实现了一个桌球游戏,并在DE2开发板上验证通过。-Use Verilog HDL to achieve a table tennis game, and through the verification on the DE2 development board.
-
-
0下载:
OVM即开放验证方法(机制篇)
基于system verilog语言-OVM (Open Verification Mechanism) source code. System verilog language
-
-
0下载:
循环冗余校验编码,CRC32,verilog实现,xilinx平台上验证,结果可用。-CRC coding, CRC32, verilog implementation, verification on xilinx platform, the results are available.
-
-
0下载:
Verilog HDL source code of generating a ROM file (in Quartuss) and testbench in Modelsim (verification)
-
-
0下载:
its about a shift register design using verilog and verification using system verilog files for uvm.
-
-
0下载:
关于LDPC解码的verilog程序,包含设计代码和验证环境-LDPC decoding on verilog procedures, including the design code and verification environment
-
-
0下载:
verilog实现流水灯功能:从左到右,然后从右到左,中间到两边,包含验证图代码、文档具体描述-verilog to achieve water lights function: left to right, then right to left, in the middle to both sides, including the verification FIG code, documentation, detailed descr iption
-
-
0下载:
原创的cmos sensor摄像头的verilog模型,可作为camera控制接口的仿真和验证。-Original verilog model cmos sensor camera can be used as simulation and verification camera control interface.
-
-
0下载:
用于FPGA的按键消抖的Verilog文件,经过modelsim仿真和下板验证。-Verilog file for FPGA key debounce, after modelsim simulation and verification under the plate.
-
-
0下载:
微处理器设计(verilog)带测试验证代码modelsim仿真无误 -Microprocessor design (verilog) with modelsim simulation test verification code is correct
-
-
0下载:
用verilog语言编写的CLA_20文件。CLA_20是20位超前进位加法器的源代码,该代码验证后功能正确,读者可以自行编写testbench代码进行验证。-With verilog language CLA 20 files. CLA 20 is 20 lookahead adder source code after the code verification function correctly, readers can write their own testbench code fo
-