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cd4000x
- CD4000 双3输入端或非门+单非门 TI CD4001 四2输入端或非门 HIT/NSC/TI/GOL 双4输入端或非门 NSC CD4006 18位串入/串出移位寄存器 NSC CD4007 双互补对加反相器 NSC CD4008 4位超前进位全加器 NSC CD4009 六反相缓冲/变换器 NSC CD4010 六同相缓冲/变换器 NSC CD4011 四2输入端与非门 HIT/TI CD4012 双4输入端与非门
istyle_103_16_l
- Fast and Small Automatic Formatter for Verilog Source Code
1602
- 用verilog写的1602驱动 仿真已经通过，可以使用-Written in 1602 by verilog-driven simulation has been passed, you can use
xapp930
- RGB to Y CB CR conversion source code in VHDL
sha
- 内带3个sha1的C源码。经验证都可用。在我们项目中，已经用于验证SHA1的verilog-With three within the C source code sha1. Experience certificate are available. In our project, has been used to validate SHA1 of verilog
use_SRAM_design_FIFO.pdf
- 利用sram技术设计的一个FIFO-failed to translate
ethernet_tri_mode.rel-1-0.tar
- ethernet mac verilog code.eth 10 100 1000mb/s
spiflash_ctrl
- VHDL 语言实现的SPI FLASH的读写-VHDL language to read and write of the SPI FLASH
DA_TLC5620
- 基于verilog hdl 的DA_TLC5620实现源码-Verilog hdl based on the realization of the source DA_TLC5620
glitch_gen
- Verilog產生glitch generator的範例-Verilog examples generated glitch generator
mips1
- Verilog MIPS design. I found it somewhere on Internet and it is working :-Verilog MIPS design. I found it somewhere on Internet and it is working :))))
LAB7
- Verilog code to move a servo.
m8086nc
- 8086 软核，m公司的。 128bit加密，没有解开，谁能解开？ -8086 softcore. source of M corp. 128bit encrypted. Who can decrypt it?
I2C_receiver
- 自己写的一个i2c slave的模块，verilog，已经通过验证，可以写可以读，希望对大家有用-To write a i2c slave module, verilog, has been validated, you can write can be read, in the hope that useful
ps2_verilog
- 用Quartus II 7.2 开发的ps2键盘与计算机串口通讯的程序-Quartus II 7.2 with the development of the ps2 keyboard and the computer serial port communication program
StopWatch
- Verilog 编写的 秒表程序，在数码管上显示，带有清0和暂停键-Stopwatch Implemented by Verilog hdl
Cyclone
- 时钟同步主要用在产生10NHZ时钟已近IRIG-B-Clock synchronization
Memory
- Example of a FIFO code in verilog language, to control a bus. With a memory stack and a testbench.
fft2
- 基于FPGA的FFT设计，非常经典，能使用-The FFT-based FPGA design, very classic, can use