搜索资源列表
74hc138
- 74ls138 基于verilog语言的实现 -Verilog language 74ls138 based on the realization of
74HC161
- 74ls161 基于verilog语言的实现 源程序在压缩包的hdl文件夹中-74ls161 language based on the realization of verilog source package in compressed folder hdl
4
- 基于FPGA的FIR数字滤波器的设计与实现,基于FPGA的FIR数字滤波器的设计与实现-FPGA-based FIR digital filter design and implementation of FPGA-Based FIR Digital Filter Design and Implementation
mmarm_EDACN
- 用FPGA实现ARM嵌入式处理器功能的Verilog源码及说明-FPGA with embedded ARM processor to achieve the functional descr iption of Verilog source code and
Modelsim_fredevider_testbench_TEXTIO
- 此文档通过分频器的例子描述了如何使用modelsim，如何编写testbench以及textio的使用-This document is an example through the divider describes how to use the modelsim, how to write a testbench and use textio
verilog_pli
- pli函数在verilog中大量应用，但介绍pli的资料并不多，压缩包中的文档是我搜集的pli的资料，希望有对你有帮助。-Pli system fuction is used in verilog language, but material related pli in domestic is rare. the rar package is my collection on pli , hop it is useful.:)
USB_CY7C68013_firmware_Verilog
- USB_CY7C68013_固件程序+FPGA测试Verilog程序-USB_CY7C68013_ Firmware+ FPGA test procedure Verilog
fft
- 用VERILOG语言实现的频谱分析仪（FFT)-VERILOG language with the Spectrum Analyzer (FFT)
TLC5510
- 基于FPGA的TLC5510控制器的设计VHDL源码-FPGA-based controller design TLC5510 the VHDL source code
8086
- 基于FPGA的8086/8088 IP核-8086/8088 FPGA IP Core
LCD
- 基于Xilinx Spartan3E的LCD驱动，能够在LCD上显示相应的字符-Based on Xilinx Spartan3E the LCD driver, LCD display in the corresponding characters
transfer
- 基于CPLD的PWM波形的发生器，编程语言为verilog,开发环境为QuartusII.-The CPLD-based PWM waveform generator, the programming language to verilog, development environment for QuartusII.
ADPCM
- APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境-APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment
EtherCAT_Communication
- ethercat通讯协议的详细说明及编程提示-ethercat a detailed descr iption of communication protocols and programming tips
ASK_32M
- ASK实现 运用verilog语言编程实现，目标FPGA为EP3C25Q240-ASK use verilog language programming to achieve the realization of the target FPGA for EP3C25Q240
uart_tx_rx
- 该工程用verilog编写，已通过串口调试助手调试通过，接收模块采用8倍波特率采样数据，有较好的滤波功能，在PC上完成自发自收功能。-Verilog prepared by the project, has passed through the serial debug debugging assistant, receiving 8 times the baud rate module sampling data, a better filtering in the PC to complet
CRC_16
- crc16的串行和并行写法，而且有详细的测试文件-Serial and parallel crc16 written, and detailed test documents
spasion_flash_verilog_model
- verilog模型,用于仿真flash，可以快速地看懂-verilog model for flash controller specified for spasion flash, please download it look at it
DS1302
- 本代码是控制DS1302的VHDL代码，浅显易懂，方便修改，注意看data sheet，保证时钟和各个延迟满足要求即可-This code is to control the DS1302' s VHDL code, easy to understand, easy changes, note the data sheet, ensure the clock and can meet the requirements of the various delays
ECDSA_Verilog
- 椭圆曲线加解密算法的verilog实现，帮助初学者有效理解ECC算法。-Elliptic curve encryption and decryption algorithm verilog implementation, to help beginners understand the ECC algorithm is effective.