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AD9954
- 设计背景:近年来现场可编程门阵列( FPGA) 技术得到了迅速的发展和广泛的应用, 其资源容量、工作频率以及集成度都得到了极大的提高, 使得利用FPGA 实现某些专用数字集成电路得到了大家的关注, 而基于FPGA 实现的直接数字频率合成器即DDS(Direct Digital Synthesizer)则更具其优点, 有着灵活的接口和控制方式、较短的转换时间、较宽的带宽、以及相位连续变化和频率分辨率较高等优点, 其也为设计者在此基础之上实现电路集成提供了另一种方法,同D/ A 转换器和低通滤波器(
dds1
- 本历程使用FPGA根据DDS原理使用VHDL语言编译成功的产生一些固定频率的DDS-The process of using the FPGA using the VHDL language according to the principle DDS compile successfully produce some fixed frequency of the DDS
FPGAPDDS
- FPGA+DDS产生信号的设计方案,比较具体,希望对你们有所帮助!-FPGA+ DDS generated signal design, more specifically, you want to help!
uart_FPGA525
- 基于FPGA的DDS,通过串口可控制其频率-Direct Digital Synthesis based on FPGA,frequency controlled by the serial communication
exp2prj1
- 基于FPGA的DDS,编写语言为verilogHDL,编辑环境为quartusII 9.0,dds频率可程控调节-a Direct Digital Synthesis based on FPGA
No.4
- 使用C8051F005开发板,控制FPGA和高速DA来DDS,两路DDS输出,90或180或0相差-Using the C8051F005 development board, the control FPGA and high-speed DA to DDS, two DDS output, a difference of 90 or 180 or 0
dds_project_FPGA_VHDL
- 基于FPGA的DDS波形发生器,VHDL,EP2C8Q208C8N-DDS waveform generator based on FPGA, VHDL, EP2C8Q208C8N
ddstest
- 这是一个电子设计dds设计的项目,本设计居于FPGA的dds,该设计舍弃了单片机作为控制的思路,在fgga中嵌入NIOSII来作为控制,界面采用12864,但是菜单页面丰富,采用菜单结构编辑了多层次的界面,整个系统看上去很简洁,希望对搞电子设计的有帮忙,本人也是搞电子设计有一段时间。-dds which base on niosII and fpga
dds1
- 用ALTERA 公司的fpga芯片,编程语言是VerilogHDL,实现DDS数字信号发生器,可以产生正弦信号,三角信号,矩形信号。-ALTERA company fpga chip, programming languages, Verilog HDL, to achieve the DDS digital signal generator, can generate sine signal, triangle signal, rectangular signal
DDS_SOPC
- 介绍了一种基于DDS/ SOPC技术的谐波信号发生器的设计方案, 详细论述了DDS的 工作原理及SOPC的设计过程。在设计中将DDS模块和MCU模块集成到一个单片FPGA上, 使设计出的系统具有集成度高、灵活性好等优点。-This paper presents a design of harmonic signal generator based on DDS/SOPC technology, particularly discussed the principle of DDS a
dds_sin
- 基于FPGA的DDS信号发生器,可以在FPGA上实现正弦波的产生,用到isp协议,sin函数rom发生器,希望这些能帮助大家!-FPGA-based DDS signal generator, sine wave generation on the FPGA, used isp agreement, the sin function rom generator, I hope These can help you!
dds_dual
- Altera FPGA 双路DDS,频率相位可预制-Altera FPGA double DDS road, frequency phase can be prefabricated
STATE_9852
- FPGA控制DDS芯片AD9852,产生幅值和频率可调的正弦信号-FPGA control AD9852 state
DDS_FPGA
- fpga实现DDS信号发生器的源代码 用于实现信号的控制-fpga DDS signal generator source code
dds3
- 有复位的DDS 实现平台为spartan-3e vhdl fpga,输出到led,coe文件由matlab产生-Reset the DDS platform spartan 3e VHDL fpga, output to led coe file from matlab
copy_DDS
- 采用FPGA编程做DDS,可以产生四波形,正弦波,方波,三角波,可调幅度,相位。-Based on FPGA programming DDS do, can produce four waveform, sine wave, square, triangle wave, adjustable amplitude, phase.
test_parallel_dds
- 提供了DDS模块板的演示程序。该程序能够使模块输出频率为156.25KHz的正弦波。-The control signals of the chip are asserted by the FPGA chip on the // core board completely. If the FPGA chip is configured properly and // there is no wrong connection, you can see a sine wave
fpgadds
- fpga的控制dds的程序,平率控制字及控制寄存器的控制-fpga control dds procedures, flat rate control word and control of the control register
FDDDDSPLLP
- 一种基于FPGA的新的的DDS+PLL时钟发生器 -An FPGA-based new DDS+PLL clock generator
dds_synthesizer_latest.tar
- 基于FPGA的DDS信号发生器,1-20Mhz。调试通过。-FPGA-based DDS signal generator ,1-20Mhz. Through debugging.