搜索资源列表
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
actel-fpga-double-port-ram
- 基于Actel FPGA的双端口RAM设计--周立功单片机-Actel FPGA-based dual-port RAM design- ZLG MCU
ARM-read-FPGA-data1.7
- ARM读取从FPGA双口RAM读取AD采样1.7-ARM FPGA dual-port RAM read to read from the AD sample 1.7
FPGA-RAM-Verilog
- 用Verilog语言编写的FPGA，对波形数据用RAM存储-Using Verilog language FPGA, using the waveform data stored in RAM
ug_ram
- RAM design for FPGA in verilog
ram
- 一个用VHDL语言编写的双端口存储器程序，可下载在FPGA中使用-Written in VHDL language using a dual-port memory program can be downloaded in the FPGA using
RAM
- 双口RAM与PXI总线接口设计，包括接口控制。-Dual-port RAM with PXI bus interface design, including interface control.
RAM
- 用VerilogHDL写的ram程序，对初学者会有帮助。-Writing the ram with VerilogHDL procedures will be helpful for beginners.
FPGA-TWO-RAM
- 这样就可以在FPGA内实现双口RAM了-This can be achieved in the FPGA dual-port RAM
RS232capture
- This approach, we feel, came very close to obtaining an image from the camera OV7620. Before we tried to capture a camera signal, we successfully transferred a test image from the FPGA s onboard RAM modules through RS232 to the PC program. This file
ram
- ram的vhdl源代码在colloy实现-ram in the vhdl source code to achieve colloy
ram
- 用FPGA做的RAM，源码，调试通过，有工程-FPGA to do with RAM, source code, debugging through, there are works
TechXclusives-UsingLeftoverMultipliersandBlockRAM
- Xilinx FPGA using leftover multipliers and block RAM
ram
- 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware descr iption language to achieve a RAM memory.
430MENUN_fpga_RAOM_LCD_KEY4X4
- msp430和fpga通信程序，可以实现单片机对fpga的通信430对fpga——ram的读写。程序包括两部分：msp430程序 和fpga程序，只需要将程序下载到fpga 和 单片机即可-fpga msp430 and communication procedures, can achieve single chip communications on 430 pairs of fpga fpga- ram read and write. Program consists of two par
ram
- 用VHDL描述了RAM的读写,很好的一个小东东,要你好好学习,用于开发RAM-OK,OK,VHDL ,FPGA,RAM,WRITE AND READ ,YOU WILL LIKE IT,ARE YOU?
my_RAM
- pdf actel fpga verilog ram读写-pdf actel fpga verilog ram read and write
FPGA-Prototyping-by-VHDL-Examples---Xilinx-Sparta
- FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others-FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others
ad-ram
- ad采样 通过fpga 传输给ram-ad fpga ram verilog
FPGA-RAM-read-and-write-procedures
- FPGA读写RAM的程序，用FPGA实现RAM，并从单片机读写数据。-FPGA RAM read and write procedures