搜索资源列表
FifoDemo
- 这是使用FIFO编写的一个排队程序，可以将读取的数据存在一个FIFO中，由应用程序读取
fifo的FPGA实现
- fifo的FPGA实现
初始化USB控制芯片，实现FIFO模式传输代码
- 初始化USB控制芯片，实现FIFO模式传输-Initialize the USB controller chip, the FIFO mode transfer
USB-slavefifo
- 在上位机上实现cy68013的slavefifo模式传输代码-In PC mode to achieve cy68013 of slavefifo transmission code
list
- 链表封装 功能：链表头指针初始化，添加节点 数据先进先出，获取某个结点的data 获取链表的结点的个数，释放链表-Linked list package features: the list head pointer initialization, add a node data FIFO access to the data of a node for the linked list of the number of nodes, the release of the link
USBPCDemo-VC
- USB2.0上位机的驱动程序，由C++编写，可用于Slave FiFO模式下。-The the USB2.0 host computer drivers by C++ preparation, can be used to the Slave FiFO mode.
FIFO_16_256
- 基于DE2平台的开发程序，完成对FIFO的初始化设置-DE2 platform based on the completion of the FIFO program, the initialization settings
USB2.0_Apptest
- usb2.0cypress 基于slave fifo的上位机-usb2.0cypress of PC-based slave fifo
FX3-firmware
- application note focuses on the design of a synchronous FIFO master interface. A master initiates transfers, drives an address bus (if present), and usually supplies a clock to the slave. The slave device used in this design is another FX3 de
fifo
- 使用外部fifo，CY7C68013A USB芯片-readme.txt for FX2_to_extsyncFIFO GPIF FIFO Transactions Auto mode see GPIF Primer section on design examples for operating instructions and details