搜索资源列表
FIFO
- 基于FPGA的FIFO控制器的设计与实现,ISE,verilog-FPGA-based design and implementation of FIFO controller, ISE, verilog
FIFO
- verilog编写的读写fifo的源码,包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
fifo
- 同步fifo的原代码,给出了经典的同步fifo原代码,希望对大家有所帮助-synchronous fifo code
cache
- (1)FIFO:First In First Out,先进先出 (2)LRU:Least Recently Used,最近最少使用 (3)LFU:Least Frequently Used,最不经常使用-(1)FIFO:First In First Out (2)LRU:Least Recently Used (3)LFU:Least Frequently Used
FIFO
- 大学生计算机操作系统课程设计,实现页面置换,利用fifo(先进先出)算法-Students of computer operating systems curriculum design, the realization of the page replacement, the use of fifo (FIFO) algorithm
fifo
- 一个FIFO的页面置换算法,使用java实现-A FIFO page replacement algorithm, the use of java to achieve
fifo
- 一个FIFO设计的例子,例子简单,但很经典。 是学好数字设计的好开端。-A FIFO design examples, example of simple, but very classic. Learn digital design is a good start.
fifo
- c语言实现内存调度 FIFO LFU LRU 基于vc6.0 -c language memory-based FIFO LFU LRU scheduling vc6.0
fifo
- a_fifo5.v verilog code for asynchronous FIFO-a_fifo5.v verilog code for asynchronous FIFO
fifo
- 这是一个用VHDL编写FIFO模块,已经通过测试-fifo
FIFO
- FIFOFile name:FIFO //Describe:32*32bit FIFO //Input:data[31:0],wrreq,rdreq,clock //Output:q[31:0],full,empty //Date:2009-12-10 -FIFO
FIFO
- fifo的实现,可以作用于memory的数据传输等地方,在fpga上实现,可以进行综合和仿真-fifo implementation, you can act on memory data transfer and other places, in the fpga to achieve, to undertake a comprehensive and Simulation
FIFO Design
- 异步fifo设计经典文章,可作为异步fifo设计基础导读(Asynchronous FIFO design classic article, can be used as the basis for asynchronous FIFO Design Guide)
SCI.fifo
- DSP2812SCI通信程序,采用 fifo模式(DSP2812SCI communication procedures, using fifo mode)
fifo
- 学习Clifford_E论文之后完成的异步FIFO,可以完成异步时钟下的数据同步(After learning Clifford_E paper, the asynchronous FIFO can be completed under asynchronous clock data synchronization)
FIFO
- STM32通过与FPGA通信读取FPGA的串行FIFO(STM32 and FPGA FIFO communication)
DSP读写基于FPGA的FIFO
- 本文档提供了DSP对FPGA中的FIFO的读写时序以及编程思路,供大家参考。(This document provides DSP on the FPGA FIFO read and write timing and programming ideas for your reference.)
异步FIFO设计
- 经典的异步FIFO设计,First Input First Output的缩写,先入先出队列,这是一种传统的按序执行方法,先进入的指令先完成并引退,跟着才执行第二条指令。(Classic asynchronous FIFO design)
同步FIFO设计
- First Input First Output的缩写,先入先出队列,这是一种传统的按序执行方法,先进入的指令先完成并引退,跟着才执行第二条指令。(Classic synchronous FIFO design)
fifo页面置换算法模拟程序
- fifo页面置换算法模拟程序 1.请求分页的置换算法(FIFO && RUL算法实现);2.按给定的顺序列,输出页面调度过程包括命中 / 缺页,调入/调出;3.计算缺页率,频率。(FIFO page replacement algorithm simulation program)