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3FSK.vhd
- 利用MAXPLUS作为仿真工具，用VHDL语言编程，采用频率键控法实现3FSK调制。对输入的系统时钟分别进行2分频，4分频和8分频得到这3种频率。通过对数字基带信号进行双二进制编码得到3个电平值，把它们作为三选一开关，来分别选择不同的频率值、选择不同的信号，从而实现3FSK调制。-As a simulation tool used MAXPLUS using VHDL language programming, using frequency shift keying modulation me
fenpinqi
- 利用microwave office实现分频器的实验框图及性能分析-Achieved using microwave office divider block diagram and performance analysis of the experimental
yibutongxun
- 用VHDL实现的异步通讯模拟程序和报告。分为控制器，接收器，发射器三部分，其中应用到了异步串行通讯控制器的设计以及非整数分频器的设计。-Asynchronous communication using VHDL simulation procedures and reporting. Divided into the controller, receiver, transmitter three parts, which applied to the design of asynchronous
The-choice-of-precision-resistance
- 硬件设计中，电阻分压、同相放大、反相放大经常会遇到精密电阻选择问题，本程序按E-96标准给的精密电阻系列，输入对应参数，自动给出最佳的精密电阻组合。-Hardware design, the resistor divider, noninverting, inverting amplifier precision resistor selection often encounter problems, the E-96 standard procedure according to the pr
binarydivider
- matlab编写的二进制除法器，能够实现64位除法运算-matlab write binary divider, the division can achieve 64