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ethmac.tar
- Free ehternet mac using verilog downloaded in www.opencores.org
ata_latest.tar
- The OCIDEC (OpenCores IDE Controller) is a WISHBONE rev.B2 compliant ATA/ATAPI-5 host implementation. The ATA (AT Attachment) interface, also known as IDE (Integrated Drive Electronics) interface, provides a simple interface to low cost non-vol
CAN(OpenCores)
- CAN控制器源码 Verilog-CAN controller source Verilog
spi_master_test
- SIMPLE SPI MASTER IP CORE FORM OPENCORES
I2c_opencores_v13.0
- i2c opencores module for Altera Avalon bus. Verilog.