adi 汇编写的2维FDCT程序,分成两个1D-DCT,每个1D-DCT 使用12次乘法和32次加法-Sa'adi compilation of the two-dimensional writing FDCT procedures, divided into two 1D - DCT. Each one D-12 DCT use multiplication and 32 Adder

基于vhdl硬件描述语言的8位加法器的设计-Based on the design of the 8-bit adder VHDL hardware descr iption language