搜索资源列表
ARM_Core
- arm verilog hdl ip core-arm Verilog HDL core ip
Free ARM-7 Core (Verilog) 可跑 uClinux
- 一个 Free 的 ARM-7 Core,是使用 Verilog 编成,综合后占用资源小,可以执行 uClinux 等程序或系统,内附详细说明的 PDF 档及源码 Verilog 编程等.
ssp_arm.rar
- arm 的ssp—spi verilog源代码,arm of the ssp-spi verilog source code
VHDL语言实现的arm内核
- 5个ram核，arm6_verilog,arm7_verilog_1,arm7_VHDL,Core_arm_VHDL,nnARM01_11_1_3 arm6_verilog.rar 一个最简单的arm内核，verilog写的，有点乱 arm7_verilog_1.rar J. Shin用verilog写的arm7核心，结构良好，简明易懂 nnARM01_11_1_3.zip.zip nnARM开源项目，国防科技大学牛人ShengYu Shen写的，原来放在opencores上，
AlteraFPGA_LM75.zip
- 周立功的FPGA ARM 51的板子上的温度传感器，本样例基于FPGA用Verilog写的。,Ligong weeks of the FPGA ARM 51 temperature sensors on the board, the FPGA-based sample written using Verilog.
ARMcore
- 基于FPGA的ARM IP核！该软核VHDL源码全部开放-FPGA-based ARM IP core! The soft core VHDL source code are all open
ARM_register
- ARM寄存器组设计的源代码，使用Verilog编程实现，可以编译仿真通过。-将中文译成英语 ARM register set design source code, the use of Verilog programming, you can compile the simulation pass.
ARM7_verilog
- arm 7 verilog code used setup soc
clock
- simple clock over verilog
mmarm_EDACN
- 用FPGA实现ARM嵌入式处理器功能的Verilog源码及说明-FPGA with embedded ARM processor to achieve the functional descr iption of Verilog source code and
BP062-BU-01000-r0p0-00rel0[1][1].tar
- AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
arm7verilog
- 支持ARM大多数指令的Verilog代码-Support for the majority of ARM instructions Verilog code for
arm7verilog
- ARM 7 免费ip 核， verilog语言描述-arm7 free ip core, verilig DHL
ARM-Verilog-HDL-IP-CORE
- ARM Verilog HDL IP CORE
arm-register-verilog
- 用verilog描述语言实现的4位、32位、arm寄存器。-Verilog descr iption language with 4-bit, 32-bit, arm register.
MIPS-ARM-ALU
- 用verilog描述语言实现的MIPS和ARM的ALU程序。-Verilog descr iption language with the MIPS and ARM ALU program.
ARM-Verilog-HDL-IP-CORE
- ARM处理器的IP核，用verilog编写的，对处理器和相关的CPU架构知识有很大帮助。-ARM processor IP core, written in verilog processor and CPU architecture knowledge.
ARM-Verilog-HDL-IP-CORE
- ARM Verilog HDL IP CORE， ARM IP核，采用verilog编写-ARM Verilog HDL IP CORE, ARM IP core, using verilog write
ARM(Verilog-a-VHDL)
- 基于VHDL/Verilog实现的arm0,ARM5-7核-Based on VHDL/Verilog implementations arm0, ARM5-7 nuclear
mys-xc7z020-arm-hdmi-xylon
- Zturn board verilog source with HDMI driver.