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朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code q
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Binary to BCD arithmetic.
这东西真不错-Binary to BCD arithmetic. This is something really good
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Binary to BCD converter
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多位二进制数转BCD码,用verilog编写-Binary number to BCD code, prepared by verilog
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General Binary-to-BCD Converter
The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
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一个用Verilog语言实现的二进制码到BCD码的一种转换方法的实现。包含工程文件和实现文档。-Verilog language implementation with a binary code to BCD code conversion method as a realization. And the achievement of the document contains the project file.
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bcd to binary verilog
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二进制转BCD码 verilog hdl Quartus II 9.0sp2 编译通过 所有的文件-Binary to BCD code verilog hdl Quartus II 9.0sp2 compile all the documents
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converts a 4-bit binary code to 2-digital BCD code in verilog code. Implements on educational kit Altera MAX7000s EPM7128SLC84-7.
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This is a binary to BCD convert designed by using the “shift and add-3 algorithm”. The verilog code of basic cell add-3 is also included in this file.
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本人编写的2进制转换为BCD码的verilog程序，绝对可用，已测试通过。-I write binary to BCD verilog program, absolutely free, have been tested.
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binary to bcd code converter design using verilog
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二进制转BCD的verilog程序，实现二进制数到BCD的转换，该程序具有节约FPGA的内部逻辑资源等特点-
Binary to BCD s verilog procedures to achieve binary number to BCD conversion, the program has an inter
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4位二进制-BCD码转换器的设计与实现.4位二进制-BCD码转换器的真值表，本实验中用Verilog语句来描述。-Design of 4 bit-BCD converter and implementation of.4 binary-BCD code converter truth table, use the Verilog statement in this experiment to describe.
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关于三位数的BCD转二进制，和二进制转BCD码。用verilog编写-BCD to Binary and Binary to BCD
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