搜索资源列表
fir_filter
- 采用vhdl语言在Altera的开发板DE2-70上实现的低通滤波器的工程-Vhdl language used in the Altera DE2-70 development board to achieve the low-pass filter project
altera_de2_vhdl
- Tutorial of VHDL with Altera DE2 board: quartus II and DE2 board The target do the BCD sum of input data coded with the switches and display the result on 7 segment display
TRDB_LCM
- DE1/DE2的TRDB_LCM驱动Verilog源代码。-DE1/DE2 of TRDB_LCM drive Verilog source code.
lcdlab1
- lcd interface with de2 board
ps2
- ps/2 keyboard, c source code for avr
altera_up_avalon_irda
- 这个是关于DE2版上的IRDA的IP。同学可以直接挂sopcbuild 上进行开发！-This is the IRDA on the DE2 version of IP. Students can be directly linked to sopcbuild on development!
DE2_lab_exercises
- 这是台湾友晶科技为DE2 FPGA开发板所提供的学习资料，非常适合大学数字电路的学习以及FPGA入门的人学习。-This is the Friends of the crystal technology DE2 FPGA development board provides learning materials, is ideal for university study and FPGA digital circuit who started learning.
displayHELLO
- verilog语言编写，在altera公司的de2实验板上实现八个数码管循环显示HELLO-verilog language, in the experimental altera de2 board to achieve the company' s eight digital control loop shown HELLO
vga_gui
- 在DE2开发板上实现，由于DE2中的SSRAM只有512K，所以640*480*3（byte）的显存是不够的显示结果是经缩放 后的效果，具体可修改Altera_UP_Avalon_Pixel_Buffer buffer模块中的相关代码。 我把代码移植到DE2-70上后，显示的就很正常了。-In the DE2 development board to achieve, due to the SSRAM DE2 only 512K, so 640* 480* 3 (byte)
ADV7123
- The ADV7123 (ADV® ) is a triple high speed, digital-to-analog converter on a single monolithic chip.
Verilog_HDL_Reference_Manual
- Altera DE2 board manual
MY_EDA
- 自己做的一个抢答器，完整代码，基于DE2的。-Myself as a Responder, complete code, based on DE2' s.
DE2_Default
- DE2开发板基本代码 DE2开发板基本代码 -basic
pmmd
- 基于nios的跑马灯设计，DE0开发板上实现了，跑马灯的流动-Based on the design of nios lanterns, DE0 Development Board on the flow, racing lights
SDRAM_ctrl
- 基于DE2的SRAM驱动，带测试程序。用VHDL语言编写。-sdram drive
incremental
- 这是基于DE2平台的增量式编译实验,对初学者很具有参考价值-This is based on incremental compilation DE2 platform experiment, a very useful reference for beginners
TV_DE2
- 修改的DE2的例子，适合模拟输入数字输出，数码管显示光点位置。-Modified example of DE2 for analog input digital output, digital display spot position.
sr8b
- This a shift register of 8bit It includes testbench It works DE2-70 board-This is a shift register of 8bit It includes testbench It works DE2-70 board
DE2shijian(1)
- FPGA与SOPC设计教程：DE2实践-第一章 fpga和de2的介绍-FPGA and SOPC design tutorials: DE2 Practice- Chapter introduction to fpga and de2
SRAM_WR
- 实现对SRAM的读写。具体功能：在DE2开发板上通过键盘SW0-SW3输入数据存入SRAM中，同时LEDR0=LEDR3显示输入数据；SW17控制SRAM的输入与读出，LEDR4-LEDR7显示读出结果。-To achieve the SRAM read and write. Specific features: In the DE2 development board via the keyboard SW0-SW3 input data into the SRAM, while LEDR0