搜索资源列表
ref-sdr-sdram-vhdl
- DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
EvsStore
- 用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
(fpga)sdram.rar
- verilog 代码，读写SDRAM 不带仿真，需要自己编写测试文件,Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
source_code.rar
- 一些源程序，主要包括CAN总线驱动、sdram VHDL实现、ucos2的移植、SDIO驱动、tcpip的实现、usb控制器代码、基于FPGA的雷达目标模拟器等,Some source code, including CAN bus driver, sdram VHDL implementation, ucos2 transplant, SDIO drivers, tcpip of implementation, usb controller code, based on the FPGA, s
sdram_ctrl1.rar
- FPGA读写SDRAM的VHDL程序，已经测试过,FPGA to read and write the VHDL procedures SDRAM have been tested
fpga-dm9000a
- 一个项目工程，硬件包含XINLINX FPGA，配置FLASH，串口，SDRAM,与以太网芯片DM9000A，实现数据采集，以太网传输，电路验证完全正确，请放心使用，SPARTAN 3E 的BGA引脚320个，不容易布板，可以参考使用的。要FPGA实现网络通信也可以参考电路，B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SD
mem_ctrl_latest.tar
- 存储器控制FPGA程序，包括ram，fifo，sdram，flash等。-FPGA memory control processes, including ram, fifo, sdram, flash and so on.
sdram-source
- SDR SDRAM 控制器的源代码 altera公司的-source code from altera
DDR_SDRAM
- ddr sdram 的控制程序，lattice的，比较好用的，大家-ddr sdram control program, lattice, and relatively easy to use, and we look
cameralink
- 由于目前基于CameraLink接口的各种相机都不能直接显示，因此本文基于Xilinx公司的Spartan 3系列FPGAXC3S1000-6FG456I设计了一套实时显示系统，该系统可以在不通过系统机的情况下，完成对相机CameraLink信号的接收、缓存、读取并显示 系统采用两片SDRAM作为帧缓存，将输入的CameraLink信号转换成帧频为75Hz，分辨率为1 024×768的XGA格式信号，并采用ADV7123JST芯片实现数模转换，将芯片输出的信号送到VGA接口，通过VGA显示器显示
sdramvhdl
- SDRAM存储器芯片，FPGA的接口控制，VHDL语言编写-SDRAM memory chips, FPGA interface control, VHDL language
sdram_hr_hw
- 在FPGA硬件上实现计算机通过串口发数据给FPGA，数据保存到SDRAM中，然后又返回给计算机串口。-In FPGA hardware realize computer data through the serial port issued to FPGA, the data saved to SDRAM, and then again back to the computer serial port.
AlteraSDR-SDRAM
- Altera 官方提供的SDRAM控制器,verilog的-SDRAM controller provided by Altera in Verilog HDL
sdram_vhd
- FPGA设计的SDRAM控制器，有仿真代码，已通过验证-FPGA Design of SDRAM controller, there is simulation code has been validated
SDRAM
- 这个是一个基于FPGA的SDRAM控制器系统，实现对SDRAM的读写操作，用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
webCam-FPGA
- 使用Verilog控制美光CMOS图像处理器，并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
SDRAM_CTR
- vhdl语言编写的fpga控制sdram的程序，包括仿真结果.-program of vhdl to control sdram in which includes the simulating results
SDRAM-controller-design-FPGA-based
- 基于FPGA的SDRAM控制器设计及应用硕士论文-SDRAM controller design FPGA based
sdram-control
- 基于FPGA的SDRAM读写控制程序，由VHDL语言编写-FPGA-based SDRAM read and write control program, by the VHDL language
SDRAM
- SDRAM编程代码，FPGA 的设计代码。(SDRAM programming code, FPGA design code.)