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jiafaqi.rar
- 利用8279芯片实现通过2X8键盘输入加数和被加数并计算出结果，同时将加数、被加数和结果都在LED灯上显示出来。,Chip 8279 through the use of 2X8 and keyboard input addend addend and calculated results, at the same time, addend, addend and the results were in the LED lights on the display.
jiafaqi
- 实现一位全加器的运算，并通过调用模块实现四位全加器的运算-Implement a full adder operation, and by calling the module' s operation four full adder
jiafaqi
- Verilog 16位超前进位加法器源码-Verilog 16 bit CLA source
jiafaqi
- 用Veriloge编的四位二进制加法器。用一个显示屏进行显示。-Veriloge series with four binary adder. With a display to display.
jiafaqi
- quartusii软件仿真实验代码 十进制加法计数器-quartusii software simulation code decimal addition counter
jiafaqi
- 能实现两个4位数的的加法运算，并显示两个加数和结果-To achieve two 4-digit addition operation, and displays the results of the two addend and
jiafaqi
- 计算机组成原理实验中加法器的verylog编程-computer
jiafaqi
- 使用硬件描述语言设计的加法器，现代逻辑器件-Hardware descr iption language design adder, modern logic devices
jiafaqi
- 数字系统设计及VHDL实践半加器与全加器源代码-half-adder and full-adder
jiafaqi
- 利用FPGA，VHDL设计一个加法器控制LED。-The use of FPGA, VHDL design an adder control LED.
jiafaqi
- 用VHDL语言实现对FPGA的程序编写，实现加法器功能。-FPGA program written using VHDL adder function.
jiafaqi
- 本实验中，我们将设计一个能进行加运算的8位（包括符号位）运算电路-In this experiment, we will design a can add operation 8 (including the sign bit) arithmetic circuit