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  1. Mae1200

    0下载:
  2. AU1200嵌入式处理器媒体加速引擎(mae)的驱动
  3. 所属分类:Windows CE

    • 发布日期:2008-10-13
    • 文件大小:75.28kb
    • 提供者:刘晖亮
  1. amdms2-02.00.30-src.tar

    1下载:
  2. au1200 linux2.6.11 硬件解码mae驱动和maiplayer播放器源码,供学习参考用
  3. 所属分类:嵌入式Linux

    • 发布日期:2008-10-13
    • 文件大小:3.08mb
    • 提供者:梁振成
  1. Au1200_MediaBSP_v1.51

    0下载:
  2. AU1200 MAE最新媒体库(配合WINCE5.0 BSP v1.51使用)
  3. 所属分类:Windows CE

    • 发布日期:2008-10-13
    • 文件大小:2.98mb
    • 提供者:qinyu
  1. FIFO

    0下载:
  2. it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.-it is a
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-30
    • 文件大小:30.81kb
    • 提供者:yasir ateeq
  1. traffic_controller

    0下载:
  2. it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.-it is a verilog code written for traffic light controlle
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-28
    • 文件大小:34.65kb
    • 提供者:yasir ateeq
  1. UART_for_FPGArar

    0下载:
  2. it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]-it is a verilog code written for MELAY state machine based UART and it wll
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:5.45kb
    • 提供者:yasir ateeq
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