搜索资源列表
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
actel-fpga-double-port-ram
- 基于Actel FPGA的双端口RAM设计--周立功单片机-Actel FPGA-based dual-port RAM design- ZLG MCU
dual_ram
- FPGA和双端口RAM的DDS任意波形发生器的实现-FPGA and dual-port RAM of the DDS Arbitrary Waveform Generator
ARM-read-FPGA-data1.7
- ARM读取从FPGA双口RAM读取AD采样1.7-ARM FPGA dual-port RAM read to read from the AD sample 1.7
FPGA-RAM-Verilog
- 用Verilog语言编写的FPGA，对波形数据用RAM存储-Using Verilog language FPGA, using the waveform data stored in RAM
ug_ram
- RAM design for FPGA in verilog
TLC5510_IIPRAM1
- FPGA控制双口RAM、实现TLC5510采样控制双口RAM读写！QUARTUS II8.0平台仿真验证通过，并在硬件上运行通过测试！-FPGA control of dual-port RAM, the realization of sampled-data control TLC5510 dual-port RAM read and write! QUARTUS II8.0 platform through simulation and hardware to run through the
ram
- 一个用VHDL语言编写的双端口存储器程序，可下载在FPGA中使用-Written in VHDL language using a dual-port memory program can be downloaded in the FPGA using
RAM
- 双口RAM与PXI总线接口设计，包括接口控制。-Dual-port RAM with PXI bus interface design, including interface control.
connect20090223
- fpga从FIFO读数据并上传到双口ram中。-FPGA read data from the FIFO and upload it to dual-port ram Medium.
RAM
- 用VerilogHDL写的ram程序，对初学者会有帮助。-Writing the ram with VerilogHDL procedures will be helpful for beginners.
ram
- ram的vhdl源代码在colloy实现-ram in the vhdl source code to achieve colloy
ram
- 用FPGA做的RAM，源码，调试通过，有工程-FPGA to do with RAM, source code, debugging through, there are works
TechXclusives-UsingLeftoverMultipliersandBlockRAM
- Xilinx FPGA using leftover multipliers and block RAM
ram
- 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware descr iption language to achieve a RAM memory.
ActelFPGA_Camera_ApplicationNote
- 摄像头的使用在当今信息化社会中越来越被重视，它可以实时采集现场环境信息，被广 用于安防、工业、交通、商业、金融、体育、军事等领域。本方案主要是基于 Actel Fla 构的 FPGA 来实现视频数据转换、 SDRAM 缓存控制、 TFT 时序控制等功能， 并通过 FPG 活的结构实现摄像头图像的采集与数据处理的功能。 -ActelFPGA_Camera_ApplicationNote
my_RAM
- pdf actel fpga verilog ram读写-pdf actel fpga verilog ram read and write
FPGA-Prototyping-by-VHDL-Examples---Xilinx-Sparta
- FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others-FPGA prototyping by VHDL examples include FIFO,RAM,ROM,filters, registers and others
dppramm
- 基于fpga的双口ram的设计与实现，好东西，希望大家喜欢-The dual-port ram fpga based design and implementation of good things, hope you like
ram
- 练习调用双口ram,fpga自产生65536个递增数，6.25Hz输出，在20ms内读出。-Exercises called dual port ram, fpga increasing number of self-produced 65536, 6.25Hz output within 20ms readout.