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FPGACOM.rar
- FPGA编程实现串口通信,源代码全。包括仿真程序。,FPGA programming serial communications, the entire source code. Including the simulation program.
标准的串口通讯设计VHDL
- 标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
serial_uart_top_new
- FPGA Cycloneii 系列的,测试串口通信程序,编程语言简洁,串口速率是115200bps,测试后好用的-Series FPGA Cycloneii to test the serial communication program, the programming language is simple and serial rates are 115200bps, easy-to-use test
eda
- 利用FPGA可编程芯片及Verilog HDL语言实现了对直流电机PwM控制器的设计,对直流电机速度进行控制。介绍了用Verilog HDL语言编程实现直流电机PwM控制器的PwM产生模块、串口通信模块、转向调节模块等功能,该系统无须外接D/A转换器及模拟比较器,结构简单,控制精度高,有广泛的应用前景。同时,控制系统中引入上位机控制功能,可方便对电机进行远程控制。-Using FPGA programmable chip and Verilog HDL language for the desi
uart
- 利用VHDL进行嵌入式设计编程,FPGA与电脑进行串口通信程序-Using VHDL programming embedded design, FPGA and computer serial communication program
uart_state
- 基于状态机编写的串口通信实验,编程语言是Verilog HDL,可发送八位数据,在Altera的EP4CE15F17C8芯片上验证成功。(与另一个发送256位不同的是这个代码比较突出状态机的使用)。-Prepared by the serial communication experiment based on state machine, the programming language is Verilog HDL can transmit eight bits of data, verif
uart_verilog
- UART串口通信代码,FPGA编程,用Verilog代码编写-UART serial communication code, FPGA programming with Verilog coding
dss_201403
- 使用verilog编写的,测试用多路串口通信信号源,用于fpga产生多路测试用串口信号,配置外围电平转换电路可以设计一个多路可编程数字信号源-Use verilog written, multiple serial communication test signal source for generating multiple test fpga serial signal, configure the external level shifting circuitry can design a
No.201710061347=UART_Verilog
- 1.硬件平台: FPGA; 2.编程语言: Verilog; 3.串口通信RS232的Verilog实现版本;(1. hardware platform: FPGA; 2. programming language: Verilog; The Verilog implementation version of 3. serial port communication RS232;)