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multiply
- 好用的浮点乘法器，可完成32位IEEE格式的浮点乘法，经过仿真通过
rgb2yuv1
- 这个主要是实现RGB和YUV两种色彩空间的转换，其中用到的主要思想是，verilog语言中的浮点乘法怎么运算，流水线的思想。-This is achieved mainly two kinds of RGB and YUV color space conversion, which uses the main idea is, verilog language how floating point multiplication operations, lines of thought.
float_mul_verilog
- 浮点乘法verilog代码，浮点格式遵循 IEEE754 标准。-Float Point Multiply , im verilog
mul(FLP)
- 一个32位元的浮点数乘法器，可将两IEEE 754格式的值进行相乘-A 32-bit floating-point multipliers, can be two format IEEE 754 values multiplied
float01092
- xilinx FPGA中浮点乘法IP核的应用，已通过验证-xilinx FPGA multiply IP
float_multi_module
- float_multi_module实现了单精度浮点乘法运算(Float_multi_module implements single precision floating point multiplication.)
float_mult32x32.v
- verilog 语言写的FPGA内部实现硬件浮点乘法器的源码，两个时钟周期完成一次浮点乘法运算(The FPGA language written in Verilog implements the source of the hardware floating point multiplier, and completes the floating point multiplication operation in two clock cycles.)