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MAC
- Verilog code for MAC
m-mtip-10_100_1000_ethermac
- 10/100 0M以太网MAC解决方案，是IP核的相关说明，利用ALTERA的FPGA设计，QUARTUS软件为开发平台。-10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform.
ethernetMAC_specification
- 10M/100/以及1000M以外网MAC设计所需的详细说明书-10M/100/1000M outside the network and MAC design required detailed instructions
stratixIII_3sl150_dev_TSE_SGMII_v1
- 该程序实现altera开发板 stratix III 3S150通过以太网与pc之间通信。 使用Quartus II和Nios II 设计。 因为altera官方没有这块板子的正确网卡与pc通信的程序，-Overall This example works at 1000M/100M/10M Base SGMII mode on SIII 3S150 Kit. Designed by Quartus II/IP Cores/Nios II EDS v8.0 This is not
Txd
- 1000M以太网媒体介入控制器EMAC的传输部分的源代码-1000M ethnet transmiter
ethernet_verilog
- 1000M以太网UDP协议在FPGA的实现源码，测试通过-1000M Ethernet UDP protocol in the FPGA to achieve source, the test passed
kcu105_sgmii_over_lvds
- sgmii use verilog coding,and can work 1000M ethernet