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32位-33M 从模式(target)PCI接口参考设计_lattice
- 32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32 / route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only
32×4bitRAM
- 32×4bit 的RAM设计。VHD语言。能在ISE上仿真。
32×8bitROM
- 32×8bit的ROM设计，VHDL语言，在ISE可以运行。
add(FLP).32位元的浮点数加法器
- 一个32位元的浮点数加法器，可将两IEEE 754格式内的值进行相加,A 32-bit floating-point adder can be both within the IEEE 754 format to add value
FixToFloat.将16位二进制有符号纯小数转换为32位单精度浮点数
- 将16位二进制有符号纯小数转换为32位单精度浮点数。实际应用时，最好加tsu、tco约束条件，速度会快些。,There will be 16-bit binary decimal symbol is converted to pure 32-bit single precision floating point. Practical applications, it is best to increase tsu, tco constraints, the speed will be faste
acc32bit 本设计为32位数字相位累加器
- 本设计为32位数字相位累加器，门级描述的Verilog代码。其中，acc32bit.v为顶层文件，full_add1.v为一位全加器的门级描述模块，flop.v为触发器的门级描述模块。-The design for the 32-bit digital phase accumulator, gate-level descr iption of the Verilog code. Which, acc32bit.v as top-level file, full_add1.v as a full
ARM32ALU
- VHDL ARM 32位ALU的设计，基于Quaryus II平台-VHDL ARM 32 位 ALU design platform based on Quaryus II
mult
- 32位浮点乘法器的源代码，用verilog来实现的-32-bit floating point multiplier source code to achieve with verilog
32-float-point-adder
- 32位浮点加法器。我第一次上载源码你就放过我吧，我就是想看一看加法器应该怎么做。-Floating point adder
alu
- 这是32位alu的代码，使用verilog写的，包含了简单的运算功能-This is a 32-bit alu code, use verilog to write, and includes a simple arithmetic functions
32_bit_complex_multiplier
- 一款32位复数乘法器，用verilog写的。-32_bit complex multiplier,written in verilog HDL.
32位超前进位加法器（verilog）
- 淘的32位超前进位加法器（verilog），已验证
CRC_32
- 用verilog语言实现的的的32位CRC生成与检验的代码-The 32bits CRC using hardware describe language of verilog
ALU_ise10migration
- It s vhdl source code for 32 bit ALU.
adder_32
- 超前进位加法器是通常数字设计所必备的，本程序为32位超前进位加法器-CLA is usually necessary for digital design, the procedure for 32-bit CLA
32-bit_multiplier_model
- 此程序为32-bit乘法器，另附有VHDL测试程序-This procedure for 32-bit multiplier, followed VHDL test procedures
32bit_RISC_CPU
- 32 risc cpu的参考设计，内涵完整的testbench-32 risc cpu s reference design, the connotation of complete Testbench
32-bit_multiplier_model
- 32-bit_multiplier_model程序，可以直接拿来使用-32-bit_multiplier_model procedures, can be directly used to use
brentkung_32
- 32 bit brentkung adder tr-32 bit brentkung adder tree
32-rip-adder
- A ripple carry adder allows you to add two 32-bit numbers