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Fir Filter
- 2 D FIR Filter
fir.rar
- fir滤波器，Verilog语言写的，容易看懂,fir filter, Verilog language written in easy to understand
FIR
- FIR结构数字滤波器，64阶。在Altera FPGA上验证通过-FIR digital filter structure, 64 bands. Verified by the Altera FPGA on the
fir
- 利用FPGA中verlog HDL实现FIR滤波功能,可自行设置相关参数，生成模块-Verlog HDL in the use of FPGA realization of FIR filtering, the provision of the relevant parameters can generate module
fir
- 比较简单的16位fir滤波器，16阶，Verilog编写-Simple 16-bit fir filter, 16 bands, Verilog prepared
FIR
- 用verilog设计的FIR滤波器。滤波器需要很快的处理速度，所以采用了wallace树算法，超前进位加法器-The FIR filter is designed with verilog. To improve the process speed, wallace tree and fast-carrylook-aheadarithmetic were used.
FIR
- 基于FPGA的FIR滤波器设计思想，里面有很好的算法供大家参考-FPGA-based FIR filter design ideas, there are very good for your reference algorithm
FIR
- FIR在FPGA中的VHDL代码实现教程-FIR in FPGA code in VHDL Tutorial
fir-vhdl-code
- FIR FILTER CODE with VHDL
verilog.DA.FIR..
- 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
fir
- code for fir filter see it is from altera site.-code for fir filter see it is from altera site.
fir
- 利用VHDL语言，设计了一个11阶的FIR滤波器。简单易懂-The use of VHDL language, designed a 11-order FIR filter. Easy to understand. .
FIR
- FIR of 1024 stage. 面向alteraFPGA器件设计-FIR of 1024 stage
FIR
- fir filter design using vhdl codes
fir
- 16阶FIR VHDL程序并附带testbench，并有简单流水线设计！-16 Tap FIR vhdl code with testbench and pipelining design
FIR
- FIR滤波器的VHDL源代码及测试文件，已通过编译仿真，绝对正确。-FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.
fir-c2h
- 基于fpga的fir滤波器的设计 非常好，谢谢大家分享-fir filter design base on fpga it is very good
fir
- 用状态机编写的FIR，verilog代码，已经经过仿真-With the state machine written in FIR, verilog code, and has passed through simulation
FIR
- FIR filter up to 128x
fir
- Verilog编的fir滤波器，可以自己输入参数序列，产生滤波波形-Verilog compiled fir filter, input parameters can be their own sequence, resulting in filtered waveforms