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ck1
- 用FPGA实现的数码管时钟,使用的是Nexys4开发板,所以使用了视觉暂留原理实现数码管的显示。-FPGA implementation with digital clock, using Nexys4 development board, so the use of the principle of persistence of vision to realize digital tube display.
IO
- 基于NEXYS4 和ISE14.7开发的并行IO接口设计,达到数码管滚动显示数字的功能-NEXYS4 and ISE14.7 developed parallel IO interface based, to the digital display digital scroll function
Nexys-4-OOB-2016.4-2
- 此文件为NEXYS4官方demo,供大家参考(NEXYS4 official demo)
nexys4vgamouseoverlay
- Demo code for mouse, nexys4 made by digilent
ADDAboard
- Connection of ADDA with NEXYS4