搜索资源列表
spi_master
- 基于CPLD/FPGA的SPI控制的IP核的实现spi_master
SPI
- SPI经典ip核 可以直接用于工程的开发和利用
SPI
- 经典spi IP 核心 FPGA是实现有说明文档-spi IP based on fpga
spi_op_core
- spi controller SPI IP core
spimaster
- SPI IP core supporting SD/MMC
SPI
- spi经典IP核, spi经典IP核.-spi classical IP core, spi classical IP core, spi classical IP core.
spi
- SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
CoreSPI_21_eval
- SPI IP核源码，包括Verilog和VHDL两种语言源码-SPI IP core source code, including the two languages Verilog and VHDL source code
spi_slave_latest.tar
- SPI IO 核，非常好用！SPI IP core ，good for use,可用于SoC以及其他模块-SPI IP core ，good for use
tcpudp
- 在niosii环境下，通过建立SPI核来驱动以太网控制器enc28j60，并通过嵌入tcp/ip协议来实现网口通信。-Niosii environment, through the establishment of the SPI core to drive the Ethernet controller enc28j60 embedded tcp/ip protocol to the network port communications.
SPI-IP
- 比较经典实用的ip核，对初学者有很大的帮助，语言比较简单。-Classic and practical IP core, a great help for beginners, the language is relatively simple.
spi_latest.tar
- This IP provides specifications for the SPI (Serial Peripheral Interface) Master core. Synchronous serial interfaces are widely used to provide economical board-level interfaces between different devices such as microcontrollers, DACs, ADCs and other
spiip
- 一个quartus的SPI接口的IP核-A quartus SPI interface IP core ...........................
uart2spi_latest.tar
- UART转SPI IP核，测试可用，包括测试文件，Modelsim环境-UART to SPI IP core test available, including test papers, Modelsim environment
spi_ip
- SPI总线的IP核，可以实现半双工spi通信-SPI bus IP core, can achieve half-duplex communication spi