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I2C总线控制器 altera提供-VHDL
- I2C总线控制器 altera提供的VHDL的源程序代码-I2C Bus Controller ALTERA the VHDL source code
i2c_control
- 本文件是iic总线控制器的vhdl语言的源代码程序-2005/09 Bus Controller VHDL language source code procedures
fpga(CAN)
- fpga实现CAN总线控制器源码,每个项目都有说明文件,介绍使用方法。-fpga CAN Bus Controller source, each with explanatory documents on the use of methods.
SDCard_Controller.rar
- SD卡控制器IP. 兼容SD卡协议2.0。与wishbone bus 接口,方便与其他IP连接使用。 ,SD Card Controller IP. Compatible with SD Card Agreement 2.0. With the wishbone bus interface to facilitate the use of other IP connections.
CAN_IP.rar
- 这是CAN总线控制器的IP核,源码是由Verilog HDL编写的。其硬件结构与SJA1000类似,满足CAN2.0B协议。,This is a IP core of the CAN bus controller written by the Verilog HDL. whose structure is similar with SJA1000,supporting the protocol of CAN2.0B.
SPItoVHDL
- VHDL语言编写的 SPI总线控制器-VHDL language ah SPI bus controller. .
canbus
- CAN通信协议的硬件描述语言代码,用于FPGA的总线接口控制器开发-CAN communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
can_parts
- This the CAN bus controller for implementation inside any FPGA-This is the CAN bus controller for implementation inside any FPGA
SRAM_Controller
- Altera University Program的Avalon总线IP核,SRAM控制代码,可以解压后直接挂载在Avalon总线上 -Altera University Program of the Avalon bus IP core, SRAM control code can be directly mounted after decompression in the Avalon bus
canbus
- 用verilog编写实现的CAN总线控制器源码,自带testbench,解压后用ISE打开工程文件即可。-Prepared with the verilog source code to achieve the CAN bus controller, bring their own testbench, after decompression project file can be opened with the ISE.
m2
- i2c buc controller is a connection oriented protocal and it is a serial bus data communication purpose
AMBA
- 基于AMBA总线的DDR2 SDRAM控制器研究与实现-AMBA bus-based Research and Implementation of DDR2 SDRAM Controller
led_control
- 本实验箱采用的液晶显示屏内置的控制器为SED1520,点阵为122×32,需要两片SED1520组成,由E1,E2分别选通,以控制显示屏的左右两半屏。图形液晶显示模块有两种连接方式,一种为直接访问方式,一种为间接访问方式。本实验采用直接控制方式。 直接控制方式就是将液晶显示模块的接口作为存储器或I/O设备直接挂在计算机总线上。计算机通过地址译码器控制E1和E2的选通;读/写操作信号R/W有地址线A1 控制,命令/数据寄存器选择信号由地址线A0控制。 -The experimenta
i2c_bus
- i2c总线控制器的verilog的实现,编译环境quartus-i2c bus controller verilog implementation, build environment quartusII
_8259A
- 8259A是专门为了对8085A和8086/8088进行中断控制而设计的芯片,它是可以用程序控制的中断控制器。单个的8259A能管理8级向量优先级中断。在不增加其他电路的情况下,最多可以级联成64级的向量优先级中断系统。8259A有多种工作方式,能用于各种系统。各种工作方式的设定是在初始化时通过软件进行的。 在总线控制器的控制下,8259A芯片可以处于编程状态和操作状态.编程状态是CPU使用IN或OUT指令对8259A芯片进行初始化编程的状态- 8259A is designed t
a10
- I2C总线控制器的VHDL设计及实现 -I2C Bus Controller Design and Implementation of VHDL
ebiu_ctl
- VHDL语言编写的外总线控制器,带有aes加密模块-VHDL language external bus controller, with aes encryption module
can_latest[1].tar
- CAN,全称“Controller Area Network”,即控制器局域网,是国际上应用最广泛的现场总线之一。最初,CAN被设计作为汽车环境中的微控制器通讯,在车载各电子控制装置ECU之间交换信息,形成汽车电子控制网络。比如:发动机管理系统、变速箱控制器、仪表装备、电子主干系统中,均嵌入CAN控制装置。 -CAN, full name of the " Controller Area Network" , the Controller Area Network, is int
TimingController
- 能够实现 LCD时序驱动,通常cpu送出的信号为data bus信号,液晶屏幕并不能正常显示,需要lcd driver-LCD timing controller, usually cpu send out the data bus signal, so the lcd driver can t display normally, need the driver
parallel-output-controller-(POC)
- 并行输出控制器,实现CPU与打印机之间的通信,程序基于VHDL语言,内附完整实验报告与仿真图像-The purpose of this project is to design and simulate a parallel output controller (POC)which acts an interface between system bus and printer. The Altera’s Quartus II EDA tool is recommended and provid