搜索资源列表
key_counter
- 4X4 KEYPAD 的输入位数计数器，可以自己定义输入的位数-4x4 KEYPAD median counter input, input their own definition of the median
抢答器
- 扳动定义为“开始”（即enable）的开关后，一排指示灯变亮，之后抢答开始，有4个扳动开关代表4个抢答器，数码管将显示出最先被扳动的开关的序号，同时发出声音，表示抢答成功。若未按“开始”前，有任意开关被扳动，则数码管显示被扳动开关的序号，并发出另一种声音，表示有人抢答。-reached for the definition of "start" (enable) the switch, a row of bright lights changed, after Respond
A8251
- 8251 端口初始化 包含定义13个输入端口和9个输出端口-8251 port initialization definition includes 13 input ports and output ports 9
lcd1602
- 可以用FPGA来实现液晶 1602 显示自己定义的字符-FPGA can be used to achieve their own definition of liquid crystal display characters 1602
8051ip
- fpga 51核，这个是我老师写的，现在就是输入输出io是分别定义的，希望能给大家提供一点帮助！-fpga 51 nuclear, this is written by my teacher, this is the input and output, respectively, the definition of io is the hope that we can provide a little help!
IDEinterface
- IDE接口时序和最全的接口定义，通过它可以实现硬盘的扇区读写-IDE interface timing and the most comprehensive interface definition, it can be achieved by sector hard disk read and write
rel_08_done
- 修改自OpenCores的黑白棋游戏代码。采用VGA输出显示，PS2键盘（W、A、S、D、回车）输入控制，实现AI，LED灯指示是否游戏结束，VGA显示频率25MHz，系统频率50MHz，经过Cyclone IV芯片EP4CE115F29C7N的板级调试，实现全部功能，文件夹下有rtl源代码，管脚定义pin文件，和可以直接进行JTAG烧写和E2PROM烧写的pof和sof文件，-Modified from OpenCores Othello game code. Using the VGA ou
07_SMP8634_IBIS_rev10_released
- 高清多媒体播放器芯片smp8634的ibis仿真模型-High-Definition Multimedia Player The SMP8634 chip of ibis simulation model
RAM
- 这是个双端口双端口ram的定义，当然读者在此基础上还可以扩充-This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded
all_packages_20080525.tar
- FMF VHDL Models All the FMF models are VHDL 93 and VITAL 2000 compliant and require the VITAL 2000 library for correct compilation. They are designed for timing backannotation by means of an SDF file. The intrinsic delays default to 1 ns. We hav
VHDL-Handbook
- vhdl handbook, definition, example, using
daima
- 用VHDL语言设计一个8位加法器： 在八位加法器代码一中：加法器是由两个4位二进制加法器U1和U2组成的8位加法器逻辑电路，其中U1用来装载8位加法器中两个加数的低4位，而U2则用来装载高4位。在设计4位加法器时，定义输入信号量CIN、A、B以及输出信号量S、Cout。定义信号量SINT/AA/BB，将加数A和0并置后赋给AA，加数B和0并置后赋给BB，形成5位二进制数，这是为在做加法时发生溢出所做的处理，然后将加数AA与BB以及进位Cin相加赋给SINT，并将SINT的低4位赋给加数和S输
ram
- EDA应用中RAM具体定义实例，供大家学习和写程序参考之用-EDA applications, examples of the specific definition of RAM, for everyone to learn and write programs for reference
rom
- EDA应用中ROM具体定义实例，供大家学习和写程序参考之用-EDA applications, examples of the specific definition of ROM, for everyone to learn and write programs for reference
MAC_Transceiver
- MAC(以太网媒体访问控制)是以太网IEEE 802.3协议规定的数据链路层的一部分,使用FPGA替代ASIC,实现以太网MAC功能非常实用。能够实现硬件系统多路多端口的以太网接入,并在自行开发需要以太网接入的嵌入式处理器设计中得到应用。具体探讨以太网MAC的功能定义,使用FPGA实现以太网MAC的方法,对以太网的相关应用设计具有指导作用。 -MAC (Ethernet Media Access Control) is a protocol under the IEEE 802.3 Ethe
rs232
- RS232的串口控制器，本程序中的每个小模块都有与之对应的testbench，模块清晰，实现结构简单。很适合Verilog编程初学者来练习！-RS232 serial port controller, the program has a small module for each corresponding testbench, module definition, to achieve simple structure. Verilog programming is suitable for
IIC
- 用标准Verilog HDL 语言编写的IIC总线IP核，详细定义了时序及输入输出， 可以直接应用-Standard Verilog HDL language of the IIC bus IP core, a detailed definition of the timing and the input and output, can be applied directly
EDA4
- 1、熟悉Quartus软件的使用及设计流程。 2、掌握利用宏模块设计方法，即使用端口和参数定义生成宏功能模块。 3、掌握正弦信号产生的原理和方法。-1, familiar with the Quartus software use and design flow. 2, using macro control module design method, which uses port and parameter definition of the macro function modu
VHDL2008
- The aim of this book is to introduce the new and changed features of VHDL-2008 in a way that is more accessible to users than the formal definition in the LRM.
bidir
- 用FPGA实现双向的引脚的定义和使用，了解bidirectional的含义和使用方法-Two-way with FPGA pin definition and use to understand the meaning and use bidirectional