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rfid_latest.tar
- rfid tag and reader with VHDL for FPGA
pie_encode
- 符合EPC C1G2协议的 数字基带 PIE编码模块源代码-The agreement with EPC C1G2 digital baseband PIE coding module source code
clk_gen
- 符合EPC C1G2协议的 数字基带 全局同步时钟产生模块源代码-The agreement with EPC C1G2 digital baseband global synchronous clock produces module source code
crc
- crc校验模块verilog源代码，符合EPC C1G2协议-The agreement with EPC C1G2 digital baseband crc verify module source code
epcverilogTimer
- 用verilog编写的epc的仿真定时器。用quartus2 仿真-Epc prepared with verilog simulation timer. Simulation with quartus2