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mealy FSM
- mealy fsm 和moore fsm-mealy Fsm and moore Fsm
fsm
- 非常好的fsm介绍,需要的可以看看,还是不错的
Verilog FSM
- 本实验介绍了FSM状态机的特点 应用等 其中源代码相当的详细,适合初学人群
fsm.rar
- 标准三段式状态机的写法 里面给出了一段式、二段式和三段式的状态机写法,便于对比,适合初学者 ,the standard format of Verilog FSM
fsm
- 有限状态机工作原理、设计方法、步骤等精要说明-Finite state machine working principle, design method, such as Essentials of steps to explain
Sequence-detector-design
- 序列检测器设计的思路大多都是用FSM来实现的,此思路是通过移位寄存器来实现序列检测-Sequence detector design ideas are often used to achieve the FSM, the idea is to achieve through the shift register sequence detection
ebook_verilog_fine_state_machine
- Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. This paper discusses a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and VHDL coding styles are presented, and
yetert
- This package includes 4-bit calculator designed in Xilinx FPGA 10 using VHDL. This calculator contains 3 registers, 1 ALU, 1 decoder and 1 FSM (finite state machine).
rafal2
- VHDL project for FPGA SPartan 3 using IseWebpack 10.1. This is an implemetation of FSM for testing 7 segment with dot point 4 digit LED display.
state
- verilog HDL下有限状态机(FSM),麻雀虽小,但五脏俱全!值得一看-under the verilog HDL Finite State Machine (FSM), the sparrow may be small, but is a fully-equipped! Worth a visit! !
AI-FSM
- 游戏AI 有限状态机的示例代码 FSM-FSM FSM FSM FSM FSM FSM FSM FSM
quicklogicuart
- Uart vhdl design FSM
FSM
- 一种简单的状态机,本程序为初学者提供了一种编制状态机的框架。-a kind of simple FSM。
VHDLcodes
- Behavioral descr iption of ALU, RAM MODULE, ROM MODULE, DIVIDE BY N COUNTER, GENERIC DIVIDER 2n+1, GCD CALCULATOR, GCD FSM CODE, JK FLIP FLOP in VHDL . These are fully synthesized codes with optimization.- Behavioral descr iption of ALU, RAM MODULE,
fsm
- Sequence detector "1100101101" using FSM(Finite State Machine) in VHDL.
FSM
- 压缩包中包含了FSM三段式的写法和利用三段式写的一个程序实例。-FSM archive contains three stages of writing and write a program using three-step examples.
SRAM
- 2. FSM is frequently used to design SRAM controller. Given the bubble diagram of a SRAM controller and its state-and-output table as shown below
fsm
- 由于工作原因,需要开发一套有限状态机框架,在此和大家分享一下源代码。-FSM(Finite State Machine) framework
fsm
- 有限状态机fsm 二段式编写 verilog(Finite state machine, FSM, two sections, verilog)
FSM two sequence
- FSM sequence detector