搜索资源列表
VHDL________
- VHDL programming samples WORD DOC FILE
CIC_DEC
- CIC抽取滤波器设计，CIC滤波器采用5阶8倍抽取。-CIC decimation filter design, CIC filter order of 8 times 5 samples.
VHDLref
- VHDL reference for VHDL programming , including the sytax, subroutines, data types, samples and the other subjects-VHDL reference for VHDL programming , including the sytax, subroutines, data types, samples and the other subjects...
CIC_DEC_3
- CIC抽取滤波器设计，CIC滤波器采用5阶3倍抽取。-CIC decimation filter design, CIC filter order 3 times 5 samples.
CIC_DEC_4
- CIC抽取滤波器设计，CIC滤波器采用5阶4倍抽取。-CIC decimation filter design, CIC filter order 4 times using 5 samples.
CIC_DEC_6
- CIC抽取滤波器设计，CIC滤波器采用5阶6倍抽取。-CIC decimation filter design, CIC filter stage 6 times 5 samples.
VHDL_microprocessor_design_principles_and_practic
- Book about VHDL. This book is for beginners, is very esae and contain samples codes
vhdlcode
- VHDL code in ISE (for collecting the ADC samples from kit and for viewing final output)
Advanced_Electronic_Design_with_VHDL
- One of these files is a design automation guideline with advanced VHDL samples. The material can be used either by beginners as well as by experienced digital designers. The second file teaches how to use PSL assertions in VHDL designs.
ADPCMCodec
- The DVI Adaptive Differential Pulse Code Modulation (ADPCM) algorithm was first described in an IMA recommendation on audio formats and conversion practices [1]. ADPCM is a transformation that encodes 16-bit audio as 4 bits (a 4:1 compression ratio).
V_ADC_SPCTR_ANALZ
- 包括了高速AD采样分析设计的全部源码，可直接应用于实际信号的AD采样分析。-Including the design of high-speed AD sampling and analysis of all source code, can be directly applied to samples of the actual signal AD.
V2_0809_SPCTR_ANALZ
- 包括了AD0809采样过程中RS232频谱分析的所有源码，可应用于实际信号的采样分析。-Sampling process, including the AD0809 RS232 spectrum analysis of all source code, can be applied to samples of the actual signal.
8w64fb
- 8位64个采样点的方波发生信号器。基于PFGA的采用PLL模块实现功能-8 of 64 samples of signal square wave device. The use of PLL-based PFGA module function
AD
- 利用VHDL是实现对ADC0809对信号是实现采样-VHDL is used to realize the ADC0809 samples the signal is achieved
Promediador
- This a Promediator for the Altera DE2-2 it use a looktable for obtein the data and then promediates the current sample with 3 past samples.-This is a Promediator for the Altera DE2-2 it use a looktable for obtein the data and then promediates the cur
Verilog-versions-of-four-models-show
- fpga驱动vga四种样本 用途广泛 这里有许多常用的实验 基础 -Four samples of fpga driver vga There are many widely used common experimental basis
verilog-hdl_135
- Verilog HDL 135例源码,Verilog开发指南实例-135 samples source code of Verilog HDL
alarm_machine
- basic verilog HDL samples realizing an alarm clock circuit
licheng
- 有关数码管，定时器，ADC，方波生成器，电压比较器的，频率计等的程序学习样本-The digital tube, timer, ADC, square wave generator, voltage comparator, such as the frequency of the program study samples
VHDL-Samples
- VHDL Samples，8-bit calculator controller；vending machine controller with typical vending machine logic ；mplements (most of) the logic required to implement a IEEE 754 multiplier unit.