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c822.rar
- 关于FPGA的一个设计，用FPGA来实现数字示波器，采样时钟为250M,On a FPGA design, FPGA to realize digital oscilloscope, the sampling clock for the 250M
DDSsinROMsample.rar
- fpga DDS ROM数据正弦波形正半周采样程序,fpga DDS ROM sinusoidal waveform is a half weeks of data sampling procedures
sin.rar
- 用Verilog语言在FPGA内实现一256个采样点的正弦波，已尝试，挺好用的~~~,Verilog language used in the FPGA to achieve one of the 256 sampling points sine wave, I have already tried it, very useful~ ~ ~
TLC549
- verilog TLC549AD采样程序 ，速度200K，在LED和数码管上显-verilog TLC549AD sampling procedures, the speed of 200K, in the LED and digital tube significantly
SPWM
- VHDL采用自然采样法写的SPWM，里面有正弦表，可以通过外接输入正弦波和三角波的频率。 -VHDL using written natural sampling SPWM, there are sine table, you can enter through the external sinusoidal and triangular wave frequency.
bridge
- FPGA和A/D转换芯片ad7862的IP，可实现4路数据的采样和读取。 用verilog实现的-FPGA and the A/D conversion chip ad7862' s IP, can achieve 4-way data sampling and reading. Achieved with verilog
sjcj
- 通过ADC0809对模拟信号进行采样，然后将转换好的8位数据迅速转存到FPGA内部存储器中，同时增加一个锯齿波发生电路，扫描时钟与地址发生时钟一致。由此完成一个示波器功能！-Through ADC0809 carried out on the analog signal sampling, and then a good 8-bit data conversion转存到rapid internal FPGA memory, at the same time increase the occurr
LVDS_DDR_List_FPGA2
- FPGA芯片与ADI公司的AD9779之间的通信，总共有四个通道，68对LVDS,采样时钟是122.88MHz-FPGA chips ADI' s AD9779 and communication between, a total of four channels, 68 pairs of LVDS, the sampling clock is 122.88MHz
Simulate
- FPGA控制AD逐点采集信号，并将AD转换后的数据串行发送出去。-FPGA to control the signal sampling point by point AD, AD conversion and serial data sent.
2007
- 本数字示波器以单片机和FPGA为核心，对采样方式的选择和等效采样技术的实现进行了重点设计，使作品不仅具有实时采样方式，而且采用随机等效采样技术实现了利用实时采样速率为1MHz的ADC进行最大200MHz的等效采样。-The digital oscilloscope and a single-chip FPGA as the core, the choice of the sampling methods and the equivalent sampling technique designed
FPGA_AD
- 基于 Cyclone EP1C6240C8 FPGA的ADS2807接口程序，主要用来使用FPGA控制ADS2807的采集。 采用FPGA来模拟ADS2807的时序来实现控制功能。 提供采样频率控制、AD通道转换、采样数据缓存等功能。-Cyclone EP1C6240C8 FPGA-based interface program of the ADS2807, ADS2807 is mainly used to control the use of FPGA collection. AD
FPGA_ADDA
- 基于 Cyclone EP1C6240C8的ADS2807，DAC2902 测试程序。主要用来使用FPGA控制ADC采集和DAC的输出，从而达到高频率信号处理的功能。首先从ADC2807采集数据，然后送给DAC2902输出。 采用FPGA口线模拟ADC2807和DAC2902的时序来实现。 提供ADC采样频率控制、DAC输出频率控制、输出波形控制、ADC通道转换、DAC通道转换等功能。-Based on Cyclone EP1C6240C8 of the ADS2807, DAC2902
FPGA_FILTER
- 利用FPGA设计降采样滤波器的方法，希望对你有用-FPGA design using down-sampling filter, and I hope useful to you
FPGA_control_AD
- 使用FPGA控制AD采样的程序，简单明了，使用方面-AD using the FPGA to control the sampling procedure is simple, use
The-FPGA-high-speed-data-acquisition
- 摘要:介绍了现场可编程门阵列FPGA(Field Programmable Gate Array)器件XCS30的主要特点、技 术参数、内部结构和工作原理，I}述了其在电力系统高速数据采集系统中的应用实例。电力数据采 集装置—馈线终端单元(FTU)需要监测多条线路的电压和电流，实时性要求高，充分利用FPGA 的并行处理能力，对输入信号实行同时采样、分时进行A/D转换，通过在FPGA片上构建的DRAM 进行数据的快速传输。FPGA在系统中承担了较多的实时任务，使DSP芯片TMS32
ads7841_control
- 本程序是fpga控制ads7841采样，fpga中用状态机来写时序，亲测可用-This procedure is fpga control ads7841 sampling, fpga using state machine to write timing, pro-test available
Fpga-based-ADC-sampling-voltage-
- 基于fpga的ADC采样电压用，显示在数码管上。verilog语言。-Fpga-based ADC sampling voltage used, displayed on the digital pipe. verilog language.
hf_mot
- 电机驱动及编码器同步采样，内部兼具多重滤波采样处理算法。(Motor drive and encoder synchronous sampling, the internal multi filter sampling and processing algorithm.)
t
- 用于NI单片机电流电压采样以及显示，其中含有部分程控电流与程控电压，可用于并联限流限压电路。(It is used for sampling and displaying the current and voltage of NI single-chip microcomputer. It contains part of program-controlled current and program-controlled voltage and can be used for parallel
ADC9481
- 利用FPGA对AD9481进行采样，亲测有用(Sampling ad9481 with FPGA)