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trellis_verlog
- ATSC发送端部分，ATSC标准特有的TCM编码，共6个文件，包含tb文件，已通过仿真，没有问题，verilog代码-ATSC transmitter, the ATSC standard TCM unique coding, a total of six documents, tb-contained documents, had passed through simulation, no problem, verilog code
AsynCommCtrl
- 基于VHDL的串行异步通信电路的设计 包括串行发送器，异步接收器，以及控制器 vhdl-VHDL-based serial asynchronous communication circuit design, including serial transmitter, asynchronous receiver. and controller vhdl
transmittermegafunction
- lvds transmitter megafunction
uart_transmitter
- Very good info. for RS-232 transmitter VHDL code .
vhdl
- RS232数据发送器,适合于VHDL的初学者参考-RS232 data transmitter, suitable for beginners VHDL reference
Digital-FM-transmitter-VHDL-coding
- it is VHDL code for Digital fm modem transmitter block.
DSSS-Transmitter
- 北斗定位系统卫星下行信号的基带处理部分——基于FPGA的直接序列扩频发射机的设计与仿真。-Beidou Positioning System satellite downlink of the baseband signal in part- based on direct sequence spread spectrum FPGA Design and Simulation of the transmitter.
A_bit_serial_data_transmitter
- 比特序列传送模块 把输入的八位比特数据 做循环后每个比特输出 详细请看英文描述-• To create Verilog-HDL modules written in the RTL style appropriate for both simulation and synthesis, for the various component parts of an Asynchronous Serial Data Transmitter. • To verify th
wlancode
- WLAN MAC Layer Transmitter protocol
Transmitter
- UART Transmitter Verilog Code
WIRELESS
- This file contains source code for DS-CDMA transciver using VHDL. it is having two source codes one is for Transmitter and another is for reciever programme.
Transmitter
- 该程序是整个OFDM发射机的程序，希望对做这方面的朋友用些帮助，也希望朋友们和我一起探讨OFDM收发信机。-The program is the whole OFDM transmitter of the program, want to do this in a friend with some help, I hope my friends join me to explore OFDM transceiver.
uart
- uart - universal asynchronous receicer and transmitter source code using VHDL
UART
- the uart transmitter and receiver are used to design the data transmission for 8bit sipo and piso in verilog
FHSSTX
- Frequency Hopping Spread spectrum...Transmitter section
Transmitter
- Transmitter
UART-Transmitter
- UART transmitter using Verilog
Verilog-Code-Transmitter
- Verilog Code for Transmitter USART
Transmitter
- 基于hdl的ofdm基带处理器发射机的设计与实现 包括 工作时钟 主控单元 导频插入 长短训练序列生成 data符号调制 循环前缀与加窗处理 IFFT/FFT 信道编码 扰码模块等-Hdl of ofdm transmitter baseband processor based design and implementation including work clock master unit pilot insertion length of the training sequence g
transmitter
- UART transmitter.v.zip