VHDL实现数字频率表功能，针对中科大复杂数字系统设计大实验进行功能补充-VHDL digital frequency table for the USTC complex digital systems design experimental functional supplement

FPGA和ASIC实现的图像中值滤波模块，各模块的仿真结果以及MATLAB,Modelsim联合仿真。这是中科大超大规模集成电路设计优化的final project。附有最终版的report和presention。-FPGA and ASIC implementation of image filtering modules, each module of the simulation results and MATLAB, Modelsim co-simulation. This is the