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sap1
- 這是用verilog寫的一個簡單的處理器，雖然只具有5個指令，但是可以透過這個範例，來了解到cpu的架構，與如何開發處理器，相信會有很大的啟發。-using Verilog This is a simple written by the processor, although with only five directives, through this example, to understand cpu architecture, how to develop processor, it w
05_UsingAccelWare
- This lab exercise will introduce you to the AccelWare IP generators. AccelWare is a library of over fifty IP generators, available in the form of three toolkits that produce synthesizable MATLAB for common MATLAB built in and toolbox functions. Each
08_CodingForHWPerformance
- The MATLAB coding style, project options and synthesis directives can have a significant effect on the final results. Knowledge about how a particular algorithm should be implemented in hardware can be reflected in the MATLAB code to improve the resu
Vc实现的cache模拟
- 计算机体系结构中cache实现原理及解决方案的模拟程序.-Computer Architecture cache Principle and solutions simulation program.
CC2430-to-CC2530-Migration-Guide
- CC2530的内部架构，包括CPU，存储器，DMA等等，读者在编程8051时读取的好资料。-CC2530' s internal architecture, including CPU, memory, DMA, etc., when the reader to read a good programming information 8051.
bomb
- source code for microchip 8 bit architecture microcontroller, created for a general pourpose timer/clock with 7 segment display, it use 2 internal timer interrupts. Build with CCS C compiler.
ARMjiagou
- ARM架构参考资料-ARM Architecture Reference
DSP-Hardware-Vido
- DSP硬件发培训视频教程，详细讲解DSP构架-DSP hardware, hair training video tutorial explain in detail DSP Architecture
ARM-architecture
- ARM体系结构介绍。。。很好。。。很具体-ARM architecture descr iption. . . Good. . . Are very specific. .
concept_of_RealTime_Systems.pdf
- 实时嵌入式操作系统概述,including harware, architecture, I/O, memory manage, task schedule,...， 入门级材料-realtime embedded operation system,including harware, architecture, I/O, memory manage, task schedule,...，
ARM_JTAG_debug_Principle
- 这篇文章主要介绍 ARM JTAG调试的基本原理。基本的内容包括了 TAP (TEST ACCESS PORT) 和 BOUNDARY-SCAN ARCHITECTURE 的介绍，在此基础上，结合 ARM7TDMI 详细 介绍了的 JTAG 调试原理。-This article introduces the basic principles of ARM JTAG debug. Basic elements include TAP (TEST ACCESS PORT) and BOUN
Specification_of_the_Embedded_Communication_System
- 《嵌入式通信设备驱动程序设计标准化》，通过对Windows和Linux环境下设备驱动程序设计模型的比较，结合通信领域嵌入式系统的特点，提出了嵌入式通信系统设备驱动程序设计标准化的构想；通过参考常用的设备驱动程序的设计思想和设计模型，制定了嵌入式通信系统设备驱动程序的分层结构，统一了底层驱动程序对上层应用或管理程序的接口，屏蔽底层的硬件特性，实现了驱动程序的规范化、标准化；在VxWorks开发环境下，对设计标准进行了详细解析，并阐述了该标准制定的原因和意义。-This paper introduc
UniversalSerialBusSystemArchitecture2NdEdition.zi
- pci book on system architecture
fatfs_R0.07c_code_source
- FatFs是一个通用的文件系统模块，以小的嵌入式系统的FAT文件系统。 FatFs的编程遵守的ANSI C格式语法标准，因此它是具有独立于硬件架构。可用于PIC, AVR, SH, Z80, H8, ARM-FatFs is a generic file system module to implement the FAT file system to small embedded systems. The FatFs is written in compliance with ANSI C,
stpckit
- x86架构的STPC的BIOS程序。包括BIOS的第一阶段代码(基本初始化)，和第二阶段代码(准备进入操作系统入口环境)。-STPC x86 architecture the BIOS program. The first phase of code, including BIOS (basic initialization), and the second phase of the code (ready to import into the operating system environm
222
- 在分析了串行 EEPROM AT24C512B的功能和 Tiny OS下硬件抽象体系结构的基础上 ,设计了基于 I 2 C总线的 EEPROM硬件抽象组 件体系 ,实现了 Tiny OS下基于 MSP430平台的串行 EEPROM驱动程序 ,同时满足了应用开发的灵活性与 传感器节点功耗低两方面的需求。-The EEPROM har ware abstracti on component architecture base on I 2 C2 BUS is desi
switched-Ethernet-architecture
- Real-time Industrial Network
CPUsourcecode
- 本设计实现了一个具有标准的32位5级流水线架构的MIPS指令兼容CPU系统。具备常用的五十余条指令，解决了大部分数据相关，结构相关，乘除法的流水化处理等问题，并实现了可屏蔽的中断网络。-This design implements a standard 32-bit 5-stage pipeline architecture of MIPS instruction compatible CPU system. Instructions with more than 50 commonly use
11107221
- 嵌入式架构，本文主要讲解了嵌入式架构，方便嵌入式架构的入门学习-Embedded architecture, this article explained the embedded architecture, embedded framework to facilitate entry to learn
Embeddedsystemsarchitectureprogramminganddesign.ra
- 嵌入式系统——体系结构，编程和设计 里面详细讲解了嵌入式的硬件，操作系统和设计例子。这本书非常适合嵌入式系统入门人员和嵌入式系统软硬件开发人员使用。-Embedded systems architecture,programming and design,it consist of embedded system hardware, operating systems and design example.And it is suitable for embedded system engine