基于quartusII利用VHDL语言实现逻辑与门的仿真并分析延时的影响-Based on quartusII using VHDL language to achieve logic and gate simulation and analysis of the impact of delay

使用逻辑分析仪抓取的一定位对一脉冲或两定位对一脉冲两种EC11旋转编码器的时序图。包括正转，反转，连续正转，连续反转时序。(Timing diagrams of two EC11 rotary encoders captured by logic analyzer for certain bits to one pulse or two to one pulse. It includes forward rotation, reverse rotation, continuous forward

Texas Instruments常用元件库 TI Analog Timer Circuit.IntLib TI Logic Flip-Flop.IntLib TI Logic Gate 1.IntLib TI Logic Gate 2.IntLib TI Logic Latch.IntLib TI Logic Switch.IntLib TI Power Mgt Voltage Reference.IntLib TI Power Mgt Voltage Regulator.In